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June 9, 2009

TJ Green Associates, LLC

   IMAPS EVENTS
Button Upcoming Webinars on Lead-Free Soldering, Precious Metals in Microelectronics, Polymers for Semiconductor Packaging, Electrical Modeling and more (read more...)

Button Registration Ends This Friday for PDCs on Wire Bonding and 3D IC Integration - June 24 in RTP, NC (read more...)

Button Early Registration Deadline Next Week for IMAPS/SEMI 2nd Annual Workshop on Wire Bonding (read more...)

Button Abstracts Due Friday, June 19 for 2nd Annual RF and Microwave Packaging Workshop (read more...)

Button Announcing Emerging Technology Workshop on Nano-Integrated Microsystems Packaging: Design, Materials, Processes and Applications (read more...)

   CHAPTER ACTIVITIES (events listed in chronological order)
Bullet This Thursday: Chicago/Milwaukee Chapter June 11 Lunch Meeting at Connor-Winfield (read more...)

Bullet Next Week: EMPC 2009 and the GBC Session on Solar Cells (read more...)

Bullet Nordic Chapter 2009 Conference - New Keynotes and Nanopackaging Tutorial Announced (read more...)

Bullet IBM, ASE Will Spotlight in IMPACT 2009 - 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference (read more...)

Bullet Germany Chapter's 2009 Conference (read more...)

   MEMBERSHIP, PRODUCTS AND PUBLICATIONS
New Jobs Posted at IMAPS Jobs Marketplace (read more...)

Draper Laboratory

IMAPS Events (view full Web Calendar)

Upcoming Webinars on Lead-Free Soldering, Precious Metals in Microelectronics, Polymers for Semiconductor Packaging, Electrical Modeling and more    ^ Top

  • Convenient — education brought to YOU at YOUR desktop/phone - no travel, traffic or time away from the office or home.
  • Inexpensive — avoid travel costs, hotel fees and other costs for traditional in-person meetings.
  • Real-time — featuring current and up-to-date information.

Our Professional Development Course (PDC) Webinar Series is a true on-line meeting - a Webinar. Upon registering, IMAPS provides the log-in details for the web software as well as the audio dial-in through your phone. You are able to view the presentation materials over your computer and listen to the live lecture through your phone. You will receive a copy of the slides for each session, have direct interaction with the instructor, and also be sent an attendee list following your webinar(s). Details on all IMAPS webinars can be viewed at www.imaps.org/webcasts.

The following webinars have been scheduled:

IMAPS PDC Webinar Series on
Lead-Free Soldering
Presented by: Dr. Jianbiao (John) Pan, Cal Poly State University
This two-session on-line Professional Development Course (PDC) webinar will be held: Thursdays, June 18, 25, 2009. All webinars will be held 12:00 noon - 1:00 pm EDT

IMAPS PDC Webinar Series on
Precious Metal Powder/Flakes and their Application in Microelectronic Packaging
Presented by: Dr. Guixiang Yang and Gary Hemphill, Technic, Inc.
This two-session on-line Professional Development Course (PDC) webinar will be held: Mondays, June 22, 29, 2009. All webinars will be held 12:00 noon - 1:00 pm EDT

IMAPS PDC Webinar Series on
Polymers for Semiconductor Packaging
Presented by: Dr. Jeff Gotro, InnoCentrix, LLC
This three-session on-line Professional Development Course (PDC) webinar will be held: Thursdays, July 9, 16, 23, 2009. All webinars will be held 12:00 noon - 1:00 pm EDT

IMAPS PDC Webinar Series on
Electrical Modeling, Analysis and Optimization of Electronic Packaging Structures for Signal and Power Integrity
Presented by: Dr. Ivan Ndip, Fraunhofer-Institute for Reliability and Microintegration (IZM); and Professor Ege Engin, San Diego State University
This two-session on-line Professional Development Course (PDC) webinar will be held: Tuesdays, August 4, 11, 2009. All webinars will be held 10:00 am - 11:00 am EDT

IMAPS PDC Webinar Series on
Guide to Component Chip Attach - Including Flip Chip
Presented by: Phillip Creter, Creter and Associates
This two-session on-line Professional Development Course (PDC) webinar will be held: Tuesdays, September 22, 29, 2009. All webinars will be held 12:00 noon - 1:00 pm EDT

Details on all IMAPS webinars can be viewed at www.imaps.org/webcasts.

Registration Ends This Friday for PDCs on Wire Bonding and 3D IC Integration - June 24 in RTP, NC    ^ Top
IMAPS has introduced a new "Traveling PDC" program. With these programs, professional development courses will be delivered at various locations around the globe for those companies or members/chapters that cannot travel for training seminars given recent economic challenges that many organizations are facing.

IMAPS will be holding two PDCs on June 24, 2009, in Research Triangle Park, North Carolina at the Sigma Xi Scientific Research Society, 3106 East NC Highway 54, RTP, NC 27709. Details on the Wire Bonding in Microelectronics course presented by Lee Levine, and the 3D IC Integration: Status and Overview PDC presented by Dr. Phil Garrou can be found below.

Register On-line

Registration Closes: Friday, June 12, 2009

Wire Bonding in Microelectronics
Presented by: Lee Levine, Process Solutions Consulting
June 24, 2009 | 8:00am - 5:00pm EDT

Key Words

Wire bond, intermetallic, ultrasonic welding, semiconductor packaging, BGA. 3D packaging, SOP

Course Description

Wire bond manufacturing defects range typically from about 50 to 1000 ppm, with exceptions to >10,000 and <50 ppm. In order to achieve the low defect rates in production, one must understand all of the conditions that affect both bond yield and reliability. This course will discuss many small- and large-wire bonding problems, as well as subjects of specific interest to hybrid/MCM device bonding. In addition, a number of advanced topics, such as high yield, fine pitch (towards 25 µm ball bond pitch), and bonding to flex will be covered. Newer developments are included along with a major discussion of wire bonding to multichip substrates, soft substrates, Cu-Lok and the special intermetallic problems occurring when fine pitch chips are used. Wire bond testing and metallurgy (covering both aluminum and gold bonds); intermetallic compounds in general; cratering; cleaning for high yield and reliability; failures resulting from electroplating; mechanical problems in wire bonding; new bond technologies and developments; how ultrasonic bonds are formed, and the metallurgy of gold and aluminum wire. It concludes with methods of making very low loops and the implementing of Flip Chip by using wire bonding/stud bumping techniques.

Recommended Text Book

Wire Bonding in Microelectronics, George Harman, McGraw Hill, NY, 1997 (List price $80). NOT required for class and NOT provided with your registration. May be available for an additional fee.

Presenter

Lee is an internationally recognized semiconductor assembly process expert with over 25 years of targeted experience in technical process development and optimization. He is known for keen analytical and troubleshooting skills in the creative and effective resolution of problems in production processes. He consistently produces business results that create enhanced revenue opportunities, higher yields and trouble free operations.

Experience:
Previous experience includes 20 years as Principal and Staff Metallurgical Process Engineer at Kulicke & Soffa and Distinguished Member of the Technical Staff at Agere Systems. He was awarded 4 patents, published more than 50 technical papers, and won the 1999 John A. Wagnon Technical Achievement award from the International Microelectronics and Packaging Society, IMAPS. Major innovations include copper ball bonding, loop shapes for thin, small outline packages (TSOP and TSSOP, and CSPs) and introduction of DOE and statistical techniques for understanding assembly processes. He is a Fellow and V.P Technology for IMAPS.

Lee is a graduate of Lehigh University, Bethlehem, Pa where he earned a degree in Metallurgy and Materials Engineering.

3D IC Integration: Status and Overview
Presented by: Dr. Philip Garrou, Microelectronic Consultants of NC (MCNC)
June 24, 2009 | 1:00pm - 5:00pm EDT

Course Description

3D IC Integration is without question the hottest topic in Microelectronics today. This course has been put together based on the authors activity in this field for the past 5 years which has included direct programs with numerous companies in the industry,his weekly 3D blog “Perspectives From the Leading Edge" in Semiconductor International and editing the 2008 (2) volume Wiley-VCH text “Handbook of 3D IC Integration: Technology and Applications of 3D IC Circuits”. The course will define and contraste 3D Integration (thinning, bonding and TSV) to 3D packaging (thinning stacking and wire bonding to a BGA base). We will look at drivers for 3D integration including the electrical performance and economic issues that are about to end CMOS device shrinkage, and the miniaturization issues faced in todays portable devices. We will then look at various proposed process sequences and the process unit operations necessary to fabricate 3D stacks. The processes sequences proposed by Universities, Institutes and commercial entities will be compared and contrasted and we will examine early adopter applications such as CIS [CMOS image sensors]; memory [DRAM and NAND]; memory on logic and heterogeneous integration. The course will end by looking the remaining technical and market barriers (design, thermal and test) and looking at the current best sources of 3D information.

Who Should Attend?

The course will be aimed at technical personnel wanting a status review of the subject and marketing/management personnel looking for a status report to help determine their position in the business food chain. In the next few years 3D integration will have a rippling effect throughthe microelectronics industry and those who are caught unaware will be sorry.

Recommended Text Book

Handbook of 3D IC Integration: Technology and Applications of 3D IC Circuits; Wiley-VCH, 2008. NOT required for class and NOT provided with your registration. May be available for an additional fee.

Presenter

Dr. Garrou is a fellow of both IEEE (2001) and IMAPS (2000)and has served as President and Technical VP of IEEE CPMT and IMAPS. He is currently Editorial Advisor and 3D integration blogger ("Perspectives From the Leading Edge")for Semiconductor International. He has authored 3 microelectronic texts including: “Handbook of 3D IC Integration: Technology and Applications of 3D IC Circuits”; Wiley-VCH, 2008 and "Enabling Technologies for 3D Integration" MRS Vol. 970, 2006. Dr. Garrou has been awarded the 2007 IEEE CPMT Sustained Technical Contributions Award for “ …25 years of leadership and technical contributions in thin film dielectric materials and microelectronic applications such as multichip modules, bumping and wafer level packaging, integrated passives, o-LEDs and most recently 3D integration" and the 2001 IMAPS WD Ashman Achievement Award for “... technical contributions to the Microelectronics Packaging Industry”.

Register On-line

Registration Closes: Friday, June 12, 2009

Early Registration Deadline Next Week for IMAPS/SEMI 2nd Annual Workshop on Wire Bonding    ^ Top
IMAPS and SEMI proudly announce the 2nd Annual Topical Workshop on Wire Bonding. This workship will be held Monday, July 13, 2009, at the San Francisco Marriott Hotel in San Francisco, CA. This event will run prior to SEMICON West 2009 – July 14-16. The Early Registration Deadline is June 19. The Hotel Deadline is June 29. Full workshop details are on-line at www.imaps.org/wirebonding.
The objective of the Wire Bonding Workshop is to have a unique forum that brings together scientists, engineers, manufacturing, academia, and business people from around the world who have been working in the area of Wire Bonding. The workshop has been specifically organized to allow for the presentation and debate of leading edge Wire Bonding Technology and Applications.

Monday, July 13, 2009
Registration: 8:30 am – 4:30 pm
Continental Breakfast: 8:30 am – 9:15 am

Opening Remarks: 9:15 am – 9:30 am

Session 1: Copper and Gold Ball Bonding
Session Chairs: Daniel D. Evans, Jr., Palomar Technologies, Inc.; Joe Bubel, Hesse & Knipps
9:30 AM - 12:15 PM

Nickel-Palladium Bond Pads for Copper and Gold Wire Bonding
Horst Clauberg, Asaf Hashmonai, Jamin Ling, Bob Chylak, Kulicke and Soffa Industries Inc.; Tom Thieme, Atotech Gmb

Wirebonded Gold Inductor on Top of ICs
James J. Wang, Power Gold LLC

HAZ-Free Ultra-Low Loop Method for Multi-Chip Stacked Die Applications
Jovy Michael G. Sena, Marcelino BuenaflorIreneo, Villavert Marit Seidel, Oerlikon ESEC USA Inc.

Session 2: Wire / Ribbon Bonding & Materials
Session Chairs: Keith Easton, Oerlikon ESEC USA Inc.; Mike McKeown, Orthodyne Electronics Corporation
9:30 AM - 12:15 PM

The Stressful World of RF Ribbon Bonding
Joseph J. Kreuzpaintner, Karen Wooldridge, Donna Gerrity, Tom Shenton, Steve Wilson, Jeff Jennings, Harris GCSD

Characterization and Calibration of the Ultrasonic System of U/S Wire and Flip-Chip Die Bonders
Mike Kölling, F&K Physiktechnik GmbH

Wire Bond Integrity Versus Surface Finish of Aluminum Clad Substrates
Barry Njoes, David Williams, Paula Goldstein, Technical Materials Inc.; Mike McKeown, Orthodyne Electronics; Steve Lopez, Farmingdale State College


Break: 11:00 am – 11:15 am


Wire Bonding Semiconductor Devices for Metallurgists
Lee R. Levine, Process Solutions Consulting

Inert Environment Requirements for Copper Ball Bonding
Bob Chylak, Shai Friedman, John Foley, Gary Gillotti, Gary Schulze, Kulicke and Soffa Industries Inc.

Practical Considerations for PowerRibbon® Bonding of Hybrid Packages
Richard Elliott, Orthodyne Electronics

Perfection Through Inspection: The Way to Zero-Defect Production of Wire Bonds
Josef Sedlmair, F&K Delvotec Bondtechnik GmbH

LUNCH: 12:15 pm – 1:15 pm

Session 3: Copper and Gold Bonding & Materials
Session Chairs: Lee Levine, Process Solutions Consulting; Keith Easton, Oerlikon ESEC USA Inc.
1:15 PM - 4:15 PM

Odd Form Factor Package Wire Bonding Case Studies
Daniel D. Evans, Jr., Palomar Technologies, Inc.

Advanced Looping in Copper Wire Bonding
O Dal Kwon, Bob Chylak, Oranna Yauw, Samuel III Capistrano, Kulicke & Soffa Industries Inc.

Overview of Actual Bonding Wire Technologies and Possible Solutions Based on Different Interconnection Materials
Tobias Mueller, Eugen Milke, Ping Ha Yeung, W. C. Heraeus GmbH

Break: 2:45 pm – 3:15 pm

Copper Wirebonding without the Plasma
Terence Q. Collier, CV Inc.

Bond Wire Yield Rate Optimization on SiP in a 3D Design Environment
John Sovinsky, Gordon Jensen, CAD Design Software

Closing Remarks: 4:15 pm

Register On-line for Wire Bonding

Abstracts Due Friday, June 19 for 2nd Annual RF and Microwave Packaging Workshop    ^ Top
IMAPS 2nd Annual Advanced Technology Workshop on RF and Microwave Packaging will be held September 22-24, 2009, at the Crowne Plaza in San Diego. The IMAPS SoCal Golf Tournament will be held the morning of September 22. Full workshop details are available at www.imaps.org/rf.

The objective of the RF and Microwave Packaging Workshop is to provide a unique forum that brings together scientists, engineers, manufacturing, academia, and business people from around the world who work in the area of RF and Microwave packaging technologies. This workshop enables discussion and presentation of the latest RF and Microwave technology.

Abstracts are being requested in the following areas:

Emerging Technologies

New Design/Materials

New Applications

  • 60 GHz Personal Area Network (PAN)
  • Short wave IR packaging
  • Nanopackaging
  • 3D RF/MW
  • New and disruptive technology
  • EMI shielding for RF/MW packaging
  • New power amplifier design beyond LDMOS
  • Thermal management
  • New IR sensors without cooling
  • Plastic RF/MW packaging
  • Lead free
  • RF MEMS
  • Military / Space
  • Optoelectronics (night vision, thermal weapon sight, etc.)
  • High Power Electronics
  • Space/Extreme Environments
  • MEMS/NEMS
  • Biomedical
  • Telecommunications
  • Reliability
  • MMIC
  • Automotive
  • SIP

Awards will be given in the following categories: Best ATW Paper; Best Session Papers; and Best Student Paper.

Those wishing to present a paper at the RF and Microwave Packaging Advanced Technology Workshop must submit a 200-300 word abstract electronically no later June 19, 2009, using the on-line submittal form at: www.imaps.org/abstracts.htm.

Full written papers are not required; however, an extended abstract of 1-4 pages is due for accepted presenters no later than August 7, 2009. All abstracts submitted must represent original, previously unpublished work. The abstracts should highlight the substrate advancements, materials processing/reliability, design, packaging issues and application. The submission section will aid in grouping the work within these three areas.

Please contact Jackki Morris-Joyner by email at jmorris@imaps.org or by phone at 202-548-4001 if you have questions.

Accepted papers may be considered for publication in the IMAPS Journal of Microelectronics and Electronic Packaging.

All Speakers are required to pay a reduced registration fee and are required to attend the entire Workshop to maximize opportunities for interaction with registered attendees.  All authors and attendees find that this IMAPS Workshop format is a proven forum for informal but highly effective networking between attendees and speakers.

Announcing Emerging Technology Workshop on Nano-Integrated Microsystems Packaging: Design, Materials, Processes and Applications    ^ Top
IMAPS announces the Emerging Technology Workshop on Nano-Integrated Microsystems Packaging: Design, Materials, Processes and Applications. This workship will be held October 13 - 15, 2009, at the University of Arkansas in Fayetteville, Arkansas. The Abstract Deadline is Friday, June 26. Full workshop details are on-line at www.imaps.org/nano.

Onset of 21st Century is marked with significant nanotechnology breakthroughs to enable new class of designs, materials and processes and nano-integrated systems. Microsystems, including microelectronics packaging, are one of the primary beneficiaries of this revolution. At the foundation of these nano innovations are the fundamental value additions offered due to nano size (<100 nm) enabling high surface to volume ratio, pristine functional characteristics and thus, unique device and material properties, ultra high packaging density, etc. Examples of nanoscale building blocks are nano structured metals like copper, quantum dots of III-V compounds, carbon nanotubes, zinc oxide nanorods, BaTiO3 nanoparticles, etc. These new classes of materials and their unprecedented properties offer opportunities to deliver excellent candidates for next generation of packaging delivering high performance and multifunctions, per dollar. Example beneficiaries are LEDs and OLEDs, z-axis interconnects, anisotropic underfills, thermally conductive epoxies, die attach solders, passive capacitors, etc. This first workshop is an important forum towards building a community of scientists, engineers and businesses working on nano-integrated technologies adding value to traditional products as well as creating new products in electronic, energy, communication, chemical and other sectors of businesses for sustainable economy.

Planned sessions include the following technical areas for keynote and speakers:

  • Session I:  Nano Materials and Properties
  • Session II:  Nanomaterials Integrated Structures:  (substrates, interconnects, underfill, adhesive, etc.) and performance
  • Session III:  Nanofabrication and Assembly Processes and Instrumentation
  • Session IV:  Nano-Integrated Microsystems Packaging Applications and Case Studies
  • Panel:  Quo Vadimus for enabling Nano-integrated Packaging Product Innovations

Those wishing to discuss the findings and developments in the form of a presentation at this workshop, please submit a 200-300 word abstract electronically no later than June 26, 2009, using the on-line submittal form at: www.imaps.org/abstracts.htm.

No formal technical paper is required.  A reproduction-ready two- to six-page concise summary with text (figures and graphs included if necessary) will be required for the abstract booklet on Friday, August 28, 2009.  A post-conference CD containing the full presentation material as supplied by authors will be mailed 15 business days after the event to all attendees.

Please contact Jackki Morris-Joyner by email at jmorris@imaps.org or by phone at 202-548-4001 if you have questions.

Accepted papers may be considered for publication in the IMAPS Journal of Microelectronics and Electronic Packaging.

Chapter Activities (events listed in chronological order)

This Thursday: Chicago/Milwaukee Chapter June 11 Lunch Meeting at Connor-Winfield    ^ Top

Date: June 11, 2009
Location:

Connor–Winfield Corporation
2359 Diehl Road Aurora, Illinois 60502
Phone: 630-499-2150

Registration:

Registration closed Monday, June 8. You can still register on-site.

IMAPS Members - $ 15
Non-members - $25
Students - $5.00.

Program:

11:30 Registration

12:00 Lunch and Registration

1:00 Opening Remarks by Rich Epich, Sales Manager at Connor-Winfield.
Self-Introductions

1:15 Greg Ballard, Senior Thickfilm Engineer at Connor-Winfield
“Printing of Silicon Wafers.”

1:45 Neil Kane, President of Advanced Diamond Technologies
“Machines Made of Diamond.”

2:15 Joe McCabe-Vice President & Rob Lindsey-Service Manager from Epoxy Technology.
“An Overview of Electrically and Thermally Conductive Adhesives.”

2:45 Event wrap-up.
Review.
Program for next event.
Propose Chapter Leadership

3:00 Optional Tour and Hybrid Circuit Works Overview by Rich Epich
Tours of an 85,000 S.F. Printed Circuit and Hybrid Assembly and/or a 35,000 S.F. Thick Film Facility will be offered. Printed Circuit and Hybrid Assembly facility includes wafer sawing, die attachment, wire bonding, Surface Mount Technology, and device packaging.

Next Week: EMPC 2009 and the GBC Session on Solar Cells    ^ Top
EMPC is Europe’s premier conference planned every two years in a different European country by the local IMAPS chapter, bringing together specialists from industry and academia. The European Microelectronics and Packaging Conference & Exhibition, EMPC 2009, will be held in Rimini, Italy on June 15-18, 2009. EMPC 2009 addresses “everything in electronics between the chip and the system”.

EMPC 2009 will feature technical sessions, an exhibition, professional development courses, a GBC Session, and poster sessions. You can view the full technical program, social activities and conference details on-line at: www.empc2009.org.

The GBC is pleased to announce a European Session to be held June 18, 2009, at 2pm during the European Microelectronics and Packaging Conference (EMPC 2009). The Conference will be held June 15-18, 2009 in Rimini, Italy. More information on EMPC 2009 can be found at: www.empc2009.org.  


1) "APOLLON: the Large Integrated European Project of FP7 on Concentrating Photovoltaic, target objectives on technology and cost
Presented by Gianluca Timo

CESI RICERCA
Via Rubattino, 54                  Via Nino Bixio, 39
20134, Milan, Italy                29100 Piacenza, Italy
tel: +39 02 3992 5499              tel: +39 0523 434369
mobile: 335374891
gianluca.timo@cesiricerca.it 

Dr. Gianluca Timò received the degree of doctor in physics from the University of Milan, Italy, in 1988 and a diploma from a post-graduate school in Science and Technology of Materials in 1990. He has been involved since 1989 in R&D activities concerning III-V based solar cells for space application. He has participated in numerous ESA projects working in CISE, ENEL RICERCA and CESI, where he leaded activities on the growth and characterisation of Single Junction and Multi Junction III-V based solar cells by using different kind of MOCVD epitaxial reactors (AIX 200, AIX 2400, AIX 2600, Veeco 450) gaining a unique experience in Europe. From year 2000 he has been involved in the development of concentrating system; in 2006 he has joined CESI RICERCA as responsible of the R&D activity on concentrating photovoltaic (CPV) and from 2009 his research group has been involved in the development of light emitting diodes. From July 2008 Gianluca Timò has been coordinating the 5 years large integrated European project APOLLON on CPV, in the frame of the Seventh Framework Program.

2) "Experience in III-V triple junction photovoltaic cells packaging for solar terrestrial concentrators."       
Presented by Ricard Pardell, Sol3G
,

Abstract -- High concentration terrestrial photovoltaics using triple junction cells is a most challenging application from the point of view of reliability under harsh conditions for  microelectronic devices. This united to a very low cost requirement make things very difficult for the microelectronics assembly designer. In this paper we review the current state of the art in this subject matter.

Ricard Pardell studied “Telecommunications Engineering (EUETT)” in La Salle Bonanova, and “Economics and Business Administration” at the UAB (Universitat Autònoma de Barcelona).  In July 2004 he founded Sol3g, one of the first companies worldwide in commercializing and research of HCPV systems. Currently Ricard Pardell, also President and CEO of the company, shares the Sol3g capital with the multinational Abengoa Solar.  Ricard Pardell has been driving the company through a very fast development.  Last results highlighted were the inauguration of a new 800 m2 factory able to  produce 10Mw annually, the completing of the world’s biggest high concentration photovoltaic installation using triple junction cell based modules, and the launch at the market of the first system, based on HCPV technology, designed for flat roofs.  In addition he is a senior partner and president of Valldoreix Consulting, CRM and information system consulting company, founded in 2001, being in his professional career always managing projects related with new technologies (Information systems, CRM systems). 

3) “Crystalline Si Solar Cells:  Markets and Technology” 
Presented by Andy London, Hereaus

Abstract -- The Solar Cell market has grown by an ACGR of over 40%.  After a 77% growth rate in 2008, the recession of 2009 will reduce this year’s growth to between 5-10%, with resumption of previous growth by 2010 and beyond.  Crystalline Si represents 90% of the market.  This paper reviews market sizes and trends, regional comparisons of cell manufacturing to installations, materials growth rates and analysis of silver pricing and affects of this market on silver usage.  Also discussed are the technology trends that will drive the crystalline Si solar cell market in the future.

Andy London has worked at Heraeus for 38 years in the Thick Film Division.  He is currently Vice President of Heraeus Materials Technology, LLC and Global Business Unit Manager for Photovoltaics.  He has served as IMAPS President in 1992 and was instrumental in the formation of the MMRC which has become the Global Business Council.

4) "Photovoltaic Present and Future – The Si potentialities"
Presented by Sartore Domenico

Abstract -- The current PV market is dominated by the c-Si panels. The industrial developments on the established technologies are continuously reducing the cost of the c-Si PV, which appears to be the dominant technology at least for the next few years. The most critical point of the supply chain is the silicon availability. New companies, like Estelux, in Italy, are going to produce silicon of the highest grade of purity for PV use. With the possibility to concentrate the light onto small area of silicon cells, the semiconductor produced by a single plant like Estelux can deliver a power production of about the 10% of the Italian installed electrical power. Cpower srl has developed a new technology of photovoltaic concentrator using Si solar cells able to achieve this ambitious result.

Mr. Domenico Sartore has been involved in PV field since the '80s and he's a pioneer of the PV activity in Italy.

1986-1993:  plant manager in a renewable energy company
1993 -1994:  technical consultant for many companies in the photovoltaic sector as “Eurosolare” S.p.A. and “BP Solar”.

In the 1994  he founded the Company S.E. Project (now Solon Spa) which has as mission the production of PV modules and the promotion of renewable energies plants

He currently is the CEO of Estelux S.p.a. and  Administrator or member of the Board of:
- Solon S.p.a.
- Green Utility
- Ecoprogetti
- Cpower srl

More information on EMPC 2009 can be found at: www.empc2009.org.  

Nordic Chapter 2009 Conference - New Keynotes and Nanopackaging Tutorial Announced    ^ Top

Dates: September 13-15, 2009
Location:

Quality Hotel, Tønsberg, Norway

On-line Info:

IMAPS Nordic is proud to announce this year’s conference in Norway. The conference will take place in the center of the “Electronic Coast” of Norway hosting a range of high tech companies. Tønsberg is only 30 minutes from the Oslo-Torp airport (TRP) and 1 hour south of Oslo.
 
The call for abstracts has closed and the technical program is now being organized. Sessions will likely focus on the following topics:

  • 3D Advanced interconnect, Advanced packaging
  • Harsh environment,
  • Ceramics: thickfilm, copper plated, DBC, LTCC
  • Chip thinning & stacking, 3D-packaging, embedding
  • CSP, flip chips, area array
  • Future electronics, trends & strategies
  • High frequency packaging
  • Integrated passive devices (IPD) & System in Package (SiP)
  • Manufacturing management & outsourcing
  • MEMS, MOEMS, sensor integration & applications
  • High temperature electronics
  • Microvia, HDI laminates, flex, embedded passives
  • Pb and halogen free electronics, methods and consequences
  • Reliability assessment, SPC
  • SMT and board assembly
  • System cost assessment
  • Unique materials, PTF, underfills and ACF, encapsulation
  • Wirebonding, COB

In addition to the technical program we have planned the following keynote presentations and a tutorial:

Keynote Presentations (Monday morning (a, b) and Tuesday (c, d) morning):

a) Rita Glenne, REC Solar: “The present and the future of silicon solar cells”

b) Muthu B. J. Wijesundara, Northern California Nanotechnology Center: "Recent Progress in SiC Sensors and Microsystems for Harsh Environments"

c) Peter Ramm, Fraunhofer IZM, "Fabrication of 3D integrated heterogeneous systems"

d) Thomas Brunschwiler, IBM Zurich Research Lab, "Thermal packaging: A holistic view from transistor to datacenter"

Tutorial:

“NANOPACKAGING - An Introduction to Nanotechnologies in Microelectronics Packaging and Modeling Techniques” by Prof. James Morris, Portland State University

For the latest information about the conference and the exhibition, visit our homepage at http://www.imapsnordic.org or send email to info@imapsnordic.org or to the Exhibition Host at exhib@imapsnordic.org

IBM, ASE Will Spotlight in IMPACT 2009 - 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference    ^ Top
Last chance! Abstract due date June 7!
The 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT 2009) is Jointly organized by IEEE CPMT-Taipei, ITRI, IMAPS-Taiwan, I-Shou University, SMTA, TPCA, and co-organized by TTMA, National Tsing Hua University and Taiwan PCB Institute. It will be held at Taipei Nangang Exhibition Hall during October 21 to 23, 2009. For attracting distinguished researchers, engineers and experts from Microsystems, Electronic materials, IC packaging, Assembly, PCB and Thermal areas to attend this technology banquet, this year, organizers focus on the theme for “IMPACT Your Future: Integration, Efficiency, & the Eco-Friendly”. The abstract deadline is June 7 and those accepted papers would be embodied in IEEE Xplore. Therefore, please grasp this last chance to enter international technology stage.

Taiwan always takes a lead in IC Packaging, Testing, Thermal, Microsystem and PCB industry. Because of this outstanding industrious performance, Taiwan is known as “Technology Island”. Organizers expect Taiwan technology could be voiced by this international conference. In addition, Taiwan technology industry could communicate with foreign advanced technology by this global platform. According to the practice, the IMPACT Technical Program Committee will select Best Student Paper Award and Outstanding Paper Award. However, for encouraging the students who study in Taiwanese University to submit PCB related thesis, organizers cooperated with Taiwan PCB institute this year. Once contributions are Taiwanese students who submit PCB paper, they could join in PCB Outstanding Thesis Award. The Gold Award will be rewarded 60,000 NTD.

IMPACT hosts have invited IBM famous manager, Dr. Steven J. Koester to give a speech. Dr. Steven J. Koester has ever announced a high-speed photodetector that could greatly increase the speed at which information travels to and from microchips, promoting performance in computers and other types of electronic systems with his partners. In this Conference, he will make an address in 3D IC technology. In addition, Dr. Ho-Ming Tong, General Manager for ASE Group, will give a keynote speech as well. Dr. Tong is a noted authority on advanced packaging technology. Besides, advanced IC packaging manufacturer, ASE will continue to join Industrial Session. Without doubt, it must lead a technical discussion and communication; in addition, organizers are going to invite other international masters to join this conference. We sincerely welcome your contribution. More detail, please refer to IMPACT 2009 Website: http://www.impact.org.tw or contact with the secretariat, Yaffy Liu. Tel: 886-3-3177272 ext. 402.

Germany Chapter's 2009 Conference    ^ Top

Dates: October 27-28, 2009
Location:

Hochschule of Munich (near Central Station)
Munich, Germany

On-line Info:

The German IMAPS-Conference 2009 will take place at the Hochschule of Munich, near Central Station. Sessions are being organized on the following topics of microelectronics, packaging or interconnection technology:

Applications

  • Telecommunication
  • Medical
  • Automotive
  • Avionics
  • Industrial Electronics
  • Logistics
  • Sensors

Design

  • Design Software
  • Design for Manufacturability
  • Design for Testability
  • Simulation
  • Thermal/electrical/mechanical
  • Simulations, RF/Microwave Simulation

System Aspects / Problem Solutions

  • Reliability & Live Cycle
  • Packaging
  • Semiconductors, MEMS, System in Package, Chip Scale Packages, MCM, System on Chip
  • Fluid Systems
  • Optoelectronics
  • Mechatronics Systems
  • High Temperature Electronics
  • Power Electronics
  • High Frequency Electronics
  • Test Systems

Processes und Materials

  • Wafer Level Processes
  • Ceramic und Organic Circuits
    • Materials, 3D Forming, HDI-Processes, Inkjetprinting, Screenprinting, Photolithography, Laser Shaping …
  • Materials
    • (Adhesives, Solders, Encapsulation, Nanomaterials, functional Layers)
  • Assembly- and Connection Technology
    • FlipChip, Wirebonding, SMT …
  • Process Control

Abstract submission has closed but direct questions to:

Dr.-Ing. Gisela Dittmar, Ingenieurbüro Elektroniktechnologie Dittmar
Albrecht-Erhardt-Str. 17, D-73433 Aalen
Tel.: +49(0)7361/931129, Fax: +49(0)7361/943004
e-mail: gisela.dittmar@imaps.de

More information is on-line at: http://www.imaps.de


Membership, Products and Publications

New Jobs Posted at IMAPS Jobs Marketplace   ^ Top
IMAPS has recently posted open positions in the on-line career center, Jobs MarketPlace. In addition, recruiters and corporate members are now calling IMAPS to help them fill vacancies.   If you are actively job searching or just want to see what quality positions are now open, IMAPS encourages you to take advantage of Jobs MarketPlace, a complimentary member service.

Recruiters can easily see your posted anonymous resume.  Please post your resume if you are job searching.  The more resumes posted in the IMAPS Jobs Marketplace, the more employers will surf resumes and post open positions in it. 

You can make your job search even easier by setting-up a job alert; compatible job openings will be e-mailed to you.  Your job alert will provide you with open positions that you specify (by industry, location, and job function) in the microelectronics markets.

The IMAPS Jobs MarketPlace is a complimentary service provided under your IMAPS membership.  Visit it and/or post your resume today.

Start on your way to a better career - http://jobs.imaps.org/home/index.cfm?site_id=117

 
 

Lorac - Furnace Experts

PDC Webinar Series on 4 Ps of Design and Manufacturing of SMT and Bottom Terminations Components such as QFN, MLF in a Lead Free World - Principles, Practice, Promises and Problems (3 Sessions)
Session 2: June 16, 2009
Session 3: June 23, 2009

GBC Session at EMPC 2009
June 18, 2009
Rimini, Italy

PDC Webinar Series on Lead-Free Soldering (2 Sessions)
Session 1: June 18, 2009

Session 2: June 25, 2009

PDC Webinar Series on Precious Metal Powder/Flakes and their Application in Microelectronic Packaging (2 Sessions)
Session 1: June 22, 2009

Session 2: June 29, 2009

Traveling PDCs: Wire Bonding, 3D IC Integration
June 24, 2009
Research Triangle Park, NC

TW on Wire Bonding
July 13, 2009
San Francisco, CA

High Temp. Electronics Network - HiTEN 2009
September 13-16, 2009
Oxford, UK

ATW on RF/Microwave Packaging
September 22-24, 2009
San Diego, CA

ATW and Tabletop Exhibition on Thermal Management
October 5-8, 2009
Palo Alto, CA

*Exhibitors contact abell@imaps.org

ETW on Nano-Integrated Microsystems Packaging: Design, Materials, Processes and Applications
October 13-15, 2009
Fayetteville, AR

IMAPS 2009 - San Jose
November 1-5, 2009
San Jose, CA

*Exhibitors contact abell@imaps.org

^ Top

Compex Corp

Oneida Research Services

 
 
 
 
 
 
 
 
 
 
 
 
 
 

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