Counterfeit Electronics Webinar Begins Next Wednesday (read
ATW on Wire Bonding - July 15 at SEMICON West (read
ATW on Advanced Interconnects - July 14 at SEMICON West (read
Abstracts Being Accepted for ATW on Nano-Integrated Microsystems Packaging: Design, Materials, Processes and Applications (read
listed in chronological order)
San Diego Chapters 2010 Summer Social - Lunch and the Del Mar Races (read
IMPACT 2010 (The 5th International Microsystems, Packaging, Assembly and Circuits Technology) (read
MEMBERSHIP, PRODUCTS AND PUBLICATIONS
Submit Your IMAPS Awards Nominations (read
full Web Calendar)
Counterfeit Electronics Webinar Begins Next Wednesday ^
Our Professional Development Course (PDC) Webinar Series is a true on-line meeting - a Webinar. Upon registering, IMAPS provides the log-in details for the web software as well as the audio dial-in through your phone. You are able to view the presentation materials over your computer and listen to the live lecture through your phone. You will receive a copy of the slides for each session, have direct interaction with the instructor, and also be sent an attendee list following your webinar(s).
IMAPS PDC Webinar Series on
Component Authentication and Screening
This two-session on-line Professional Development Course (PDC) webinar will be held:
Wednesdays, July 14 and 21, 2010
All webinars will be held 12:00 noon - 1:00 pm EASTERN
IMAPS Members: $125 per webinar; 2-course series $200
Non-members: $200 per webinar; 2-course series $375 (includes one-year complimentary individual membership in IMAPS)
Registration Deadline: July 13, 2010
counterfeit EEE, supply chain, authentication, testing and characterization
Counterfeit electronics have been reported in a wide range of products, including
computers, telecommunications equipment, automobiles, avionics and military systems.
Counterfeit electronic products include everything from very inexpensive surface mount
capacitors and resistors to expensive microprocessors. Unfortunately, the counterfeit EEE
component problem is growing rapidly and no signs of abatement are in sight.
The webinar begins with an introduction to electronic parts supply chain, the sources of
authorized and unauthorized parts. Attendees will learn about the status of the electronic
part distribution market and how it has changed over the past decade. The movement of
the manufacturing and technology know-how across the globe will be covered to
understand the international aspect of the counterfeit electronics supply chain. This part is
followed by information on the extent of the counterfeit electronics problem with
illustrative examples that emphasize the aspects of supply chain.
The webinar further covers the tools and techniques that engineers need to understand
for determining the risk levels of components that require authentication. Basic
inspection and electrical testing will be covered with an emphasis on the tools and
techniques necessary for positive identification of parts that are not authentic in their
representation. Attendees will also learn how to effectively engage specialist electrical
and material testing laboratories in a cost effective manner to determine risk of
Lecture topics in webinar will include:
- Electronic part supply chain
- Counterfeit parts: types and examples
- Sources of counterfeit parts
- Mitigation techniques and few anti-counterfeiting efforts
- Testing and characterization
- Electrical Characterization
o Optical Microscopy
o X-Ray Microscopy
o Scanning Acoustic Microscopy
o X-ray fluorescence Spectroscopy
o Environmental Scanning Electron Microscopy (ESEM) / Energy
Dispersive Spectroscopy (EDS)
o Materials Characterization Tools
Component engineers, Engineering managers, Procurement Managers, Quality Managers, Failure Analysts, Contracts personnel and anybody who is involved in policy making activities in fields of marketing or procurement of electronics parts or assemblies.
Bhanu Sood is the Director of the Test Services and Failure Analysis (TSFA) Laboratory at the University of Maryland's Center for Advanced Life Cycle Engineering (CALCE). He holds Masters Degrees in Advance Materials Processing and Materials Science, and a Bachelors Degree in Mechanical Engineering.
His research areas include electronic materials characterization, electronics part authentication techniques, investigation into failure/degradation modes and mechanisms in lithium-ion batteries, electronic components, assemblies and, printed circuit board (PCB) materials. Prior to joining CALCE in 2005 Mr. Sood worked at U.S. Naval Research Laboratory (NRL) in the areas of embedded electronics, micro-power sources, Laser assisted micro-fabrication, characterization of electrically conductive polymeric formulations and advanced materials. His technical publications include papers on failure site isolation techniques, PCB materials, embedded electronics, energy storage systems and instrumentation for mechanical studies. Mr. Sood has taught numerous industry courses in the areas of electronics reliability, root cause failure analysis techniques and materials characterization tools.
Details on all IMAPS webinars can be viewed at www.imaps.org/webcasts.
ATW on Wire Bonding - July 15 at SEMICON West ^
The third annual ATW on Wire Bonding will be held Thursday, July 15, at the San Francisco Marriott Hotel in San Francisco, CA. This event will be co-located with IMAPS Workshop on Advanced Interconnect Technologies and with SEMICON West 2010. Visit www.imaps.org/wirebonding for full details and to register.
The objective of the Wire Bonding Workshop is to have a unique forum that brings together scientists, engineers, manufacturing, academia, and business people from around the world who have been working in the area of Wire Bonding. The workshop has been specifically organized to allow for the presentation and debate of leading edge Wire Bonding Technology and Applications.
Registration: 8:00 am - 3:40 pm
Continental Breakfast: 8:00 am - 9:00 am
Opening Remarks: 9:00 am - 9:15 am
Session 1: Fine Au & Cu Wire Bonding
Session Chair: Leroy Christie, ASM Pacific Technology, Ltd.
9:15 am - 12:30 pm
More than 90% of all chip interconnections are produced by wire bonding either fine gold or copper wire. Gold is still the dominant wire material but the use of copper wire is increasing rapidly and represents the highest growth segment of the market. This session will focus on the use of fine wire (<0.1mm diameter) for chip interconnection.
Ball Bonding with Pd-Coated Cu Wire
Horst Clauberg, John Foley, Bob Chylak, Kulicke & Soffa Industries, Inc.
Comparison of Bare Copper and Palladium Coated Copper Wire in Wire Bonding
Johnny Yeung, Dominik Stephan, Frank Wulff, Heraeus Materials Singapore Pte Ltd.
Fine Copper Wire Bonding for IC & Advanced Packaging Applications: Challenges & Solutions
Mohandass Siva Kumar, Balasubramanian Senthil Kumar, James Song, Leroy Christie, ASM Technology Singapore PTE LTD.
Session 2: Heavy Wire Bonding
Session Chair: Mike McKeown, Orthodyne Electronics Corporation
9:15 am - 12:00 pm
Power devices are often bonded with larger diameter wire or ribbon and are widely used in automotive and power controlling applications. This session will focus on the unique metallurgical requirements for successfully bonding heavy wire and ribbon.
Wire Bond Surfaces for Large Diameter Aluminum Wire and PowerRibbon® Bonding
Mike McKeown, Orthodyne Electronics Corporation
Effects of Rigidity of Adhesively Attached Boards on Heavy Gage Al Wire Bond Performance
William S. Boyce, Sensata Technologies Inc.
Ribbon Bonding: Qualification Tests, Actual Projects, Problems
Martin Strasser, AB Mikroelektronik GmbH
Break: 10:45 am - 11:00 am
FAB Characterization for Copper Fine Pitch Bonding
Liming Shen, Don Capistrano, Adeline Lim, Oranna Yauw, Kulicke & Soffa Pte. Ltd.; John Foley, Kulicke & Soffa Industries, Inc.
Active and Semi-Active Vibration Control of Ultrasonic Bonding Transducers
Marcus Neubauer, Sebastian M. Schwarzendahl, Jörg Wallaschek, Leibniz University Hannover; Michael Brökelmann, Hans-J. Hesse, Hesse & Knipps GmbH
Conditions for Optimized Deep Access - Gold Ball Bonding Performance
Larry E. Crider, Stephen Russell, Christopher Martin, Harris GCSD
A Low Cost Aluminum Wire Bondable Nickel Coating For use in Electronic Applications
Michael J. Brouillard, Sumco LLC
The Effects of Loop Geometry on Life Test Durability for 10mil Al Wire Bonds
William S. Boyce, Sensata Technologies Inc.
Lunch: 12:30 pm - 1:30 pm
Session 3: Wire Bonding Reliability and Testing
Session Chair: Daniel Evans, Palomar Technologies, Inc.
1:35 pm - 3:35 pm
Assuring the reliability of wire bonds by mechanically testing has been adopted widely. Pull testing and shear testing on a sampling basis are common. New in-process techniques are always of interest, especially in environments where high-reliability is required. This session will focus on wire bonding quality and reliability.
Improved Bond Reliability Through the use of Auxiliary Wires (Security Bumps/Wires and Stand-Off Stitch - Stitch on Bump)
David Rasmussen, Palomar Technologies, Inc.; Rod Thompson, Goodrich Corporation
Automatically Better Pull- and Shear Tests
Josef Sedlmair, Siegfried Seidl, Farhad Farassat, F&K Delvotec Semiconductor GmbH
The Importance of Bond Strength Measurement
Bob Sykes, XYZTEC
Adverse Effects of Cross Contamination of AgPd Bond Pads During Processing
William S. Boyce, Sensata Technologies Inc.
Closing Remarks: 3:35 pm
ATW on Advanced Interconnects - July 14 at SEMICON West ^
The new ATW on Advanced Interconnect Technologies will be held Wednesday, July 14, at the San Francisco Marriott Hotel in San Francisco, CA. This event will be co-located with IMAPS Workshop on Wire Bonding and with SEMICON West 2010. Visit www.imaps.org/advintercon for full details and to register.
The Advanced Interconnect Technologies Workshop has been organized to allow for the presentation and debate of some of the latest interconnect and processing technologies in Electronic Packaging.
Wednesday, July 14, 2010
Registration: 7:00 am - 5:00 pm
Continental Breakfast: 7:00 am - 8:00 am
Opening Remarks: 8:20 am - 8:30 am
Keynote Presentation: 8:30 am - 9:30 am
Future Interconnect Demands for Super Computing
How T. Lin, Ph. D., Endicott Interconnect Technologies, Inc.
Dr. Lin is a Chief Scientist in the R&D group of Endicott Interconnect Technologies, Inc. and holds a Ph. D. in electrical Engineering from Rensselaer Polytechnic Institute. He earned both MSEE and BEE in EE both from Georgia Institute of Technologies. He was with IBM MD from 1977 to 2001 where he developed large scale precisions artwork generators and high-speed PWB testers. Currently, he is the TA of company CTO at Endicott Interconnect Technologies working on developing advanced computing architectures, advanced electronic packaging technologies and optical interconnects. Dr. Lin has received three IBM Outstanding Innovation/Achievement Awards and 40 US issued Patents. He has published over 30 journal articles in the area of optical interconnects, electronic and electro optical packaging.
Session 1: 3D Interconnect
Session Chair: Anwar Mohammed, Huawei Technologies
9:30 am - 12:00 pm
The next significant frontier in Semiconductor Packaging is 3D integration. It offers many promises and expectations and yet there are substantial challenges that need to be surmounted. The touted benefits include enhanced performance, lower power consumption, optimized real estate utilization, improved reliability and yields and reduced packaging and overall cost. It is also envisaged that this technology will play a leading role in board size reduction and integration which will be a salient challenge in the very near future. However, promising 3 D approaches like Through Silicon Vias (TSVs) and others will need to solve critical processing, manufacturing and supply chain issues before the technology can claim an acceptable level of maturity that can lead to mass conversions. This session will cover some of those challenges and alternative approaches to overcome them.
Sub-70 mm Dispensable Interconnects for 3D System-In-Package Assemblies
Suzette K. Pangrle, Jeff S. Leal, Marc Robinson, Bruce King, Mark Kowalski, Sunil Kaul, Vertical Circuits, Inc.
Break: 10:15 am - 10:30 am
Advances in Wafer Bonding Techniques Enabling Vertical Integration
Bioh Kim, Thorsten Matthias, Markus Wimplinger, Paul Lindner, EV Group
Aerosol Jet® Printer as an Alternative to Wire Bond and TSV Technology for 3D Interconnect Applications
Michael O'Reilly, Michael J. Renn, Bruce H. King, Optomec, Inc.
Lunch On Your Own: 12:00 pm - 1:30 pm
Take some time to visit SEMICON West 2010 - www.semiconwest.org
Session 2: Advanced Interconnect Materials/Processes
Session Chair: Zhihao Yang, NanoMas Technologies
1:45 pm - 5:00 pm
Innovative materials and processes are the key enablers for continuous development of advanced interconnect technologies for electronic packaging, such as 3D and high density packaging, photonic/optoelectronic packaging, underfill/encapsulants and adhesive, flip-chips, wirebonding and stud bumping, ceramic, polymer, nanomaterials, conductive materials, Cu/low-K, etc. Presentations in this session will cover the most recent developments in materials and processes for advanced interconnect technologies.
Electromigration Performance of Fine-pitch µPILR Interconnects in Flip Chip
Rajesh Katkar, Laura Mirkarimi, Ilyas Mohammed, Tessera Inc.
Printing Conductive Traces using Nano Silver-Based Inks
David Van Heerden, Hichang Yoon, Yu Do, Zhihao Yang, NanoMas Technologies
Break: 3:15 pm - 3:30 pm
A First Individual Solder Joint Encapsulant Adhesive
Wusheng Yin, Mary Liu, YINCAE Advanced Materials, LLC
Optical Interconnect Using Optopolymer Material
How Lin, Benson Chan, David Bajkowski, Jay Huang, Endicott Interconnect Technologies, Inc.
Closing Remarks: 5:00 pm
Abstracts Being Accepted for ATW on Nano-Integrated Microsystems Packaging: Design, Materials, Processes and Applications ^
The Advanced Technology Workshop on Nano-Integrated Microsystems Packaging: Design, Materials, Processes and Applications will be held November 4-5, 2010, at the Marriott Raleigh City Center in Raleigh, NC. Abstracts are being accepted until July 23. Submit today. Visit www.imaps.org/nano for full details.
Onset of 21st Century is marked with significant nanotechnology breakthroughs to enable new class of designs, materials and processes and nano-integrated systems. Microsystems, including microelectronics packaging, are one of the primary beneficiaries of this revolution. At the foundation of these nano innovations are the fundamental value additions offered due to nano size (<100 nm) enabling high surface to volume ratio, pristine functional characteristics and thus, unique device and material properties, ultra high packaging density, etc. Examples of nanoscale building blocks are nano structured metals like copper, quantum dots of III-V compounds, carbon nanotubes, zinc oxide nanorods, BaTiO3 nanoparticles, etc. These new classes of materials and their unprecedented properties offer opportunities to deliver excellent candidates for next generation of packaging delivering high performance and multifunctions, per dollar. Example beneficiaries are LEDs and OLEDs, z-axis interconnects, anisotropic underfills, thermally conductive epoxies, die attach solders, passive capacitors, etc. This first workshop is an important forum towards building a community of scientists, engineers and businesses working on nanointegrated technologies adding value to traditional products as well as creating new products in electronic, energy, communication, chemical and other sectors of businesses for sustainable economy.
Planned sessions include the following technical areas for keynote and invited speakers:
- Session I: Nano Materials and Properties
- Session II: Nonmaterial Integrated Structures: (substrates, interconnects, Underfill, adhesive, etc.) and performance
- Session III: Nanofabrication and Assembly Processes and Instrumentation
- Session IV: Nano-Integrated Microsystems Packaging Applications and Case Studies
- Panel: Quo Vadimus for enabling Nano-integrated Packaging Product Innovations
Those wishing to discuss the findings and developments in the form of a presentation at this workshop, should submit a 250-300 word abstract electronically by July 23, 2010, using the on-line submittal form at: www.imaps.org/abstracts.htm. If you need assistance with the on-line submission form, please e-mail Jackki Morris-Joyner (email@example.com) or call 305-382-8433.
listed in chronological order)
San Diego Chapters 2010 Summer Social - Lunch and the Del Mar Races ^
IMAPS San Diego will hold its summer social meeting at the Del Mar Thoroughbred Club on Sunday, July 25th. The first race is at 2:00 but come earlier to enjoy lunch at the El Palio Restaurant on the 6th floor. Come out to see old friends and test how microelectronics risk management relates to betting on the ponies.
A $25 pre-registration fee is required. The fee entitles you to entry through the Stretch Run gate (you must enter through this gate), program, reserved table, and $20 of Del Mar cash to be used for food and beverage purchases.
To register on-line, go to:
The Turf Club dress code does not apply. See the following El Palio menu for dining options. Tickets will be mailed to you. Scrip will be distributed at the track. Look for Casey Krawiec when you arrive at the restaurant.
Space is limited to the first 30. Don’t delay. Gittee up!
Option #1- Derby Buffet
Il Palio Soup of the Day
Grilled Vegetable Antipasto
Grilled Eggplant, Asparagus, Gold Bar and
Zucchini, Mushrooms, Red and Yellow Peppers
in Balsamic Basil Marinade
Il Palio Salad Bar
Spring Mix Salad with Seasonal Toppings & Choice of Dressings
Chef’s Special of the Day with Selected Accompaniments
Daily Carving Station with Fresh Silver Dollar Rolls and Appropriate Garnishes
Individual Plated Dessert
$27.95 plus tax per person
(Tax & Service Charge Added To Pre-Orders)
*Beverages Not Included
Option #2-daily A La Carte Menu
Turf Club Shrimp Cocktail Supreme with Cocktail Sauce and Lemon 14.50
Imported & Domestic Cheese Plate with Grapes, Strawberries & Figs 14.50
Turf Club Caesar Salad Romaine Hearts and Radicchio with Creamy Caesar Dressing,
Parmesan Cheese, Garlic Croutons and Tomatoes 8.95
…add Grilled Chicken Breast 14.95
Del Mar Cobb Diced Roast Turkey Breast, Crumbled Bacon, Blue Cheese, Tomato, Chopped
Hard-Cooked Egg and Avocado on Mixed Greens 15.40
All-Beef ½-Pound Harris Ranch Cheeseburger on a Toasted Sesame Roll, Choice of Cheddar, Swiss or Pepper Jack Cheese 13.75 with Bacon 14.95 *Choice of Cole Slaw, Fruit or Housemade Chips
Grilled Angus Ribeye Steak Sandwich Served Open-Faced on a Garlic Foccacia, Gorgonzola Butter, Crispy Onion Strings 17.95 *Choice of Cole Slaw, Fruit or Housemade Chips
Roast Turkey Sliced Thin Stacked High on Squaw Bread with Cheddar Cheese, Avocado, Lettuce, Tomato and Red Onion 13.50 *Choice of Cole Slaw, Fruit or Housemade Chips
Del Mar’s Famous Hot Corned Beef on Rye with Spicy Mustard 13.95
*Choice of Cole Slaw, Fruit or Housemade Chips
IMPACT 2010 (The 5th International Microsystems, Packaging, Assembly and Circuits Technology) ^
2010 is a rebounding year of electronics industry. Google smart phones, smartbooks, eBooks, touch-screen devices, cloud computing, hybrid cars, wireless-sensor apparatuses and etc will be released in this year. It will bring countless business opportunity and possibility in to the market. Taiwan takes the lead in semiconductor, packaging, assembly and PCB industries in the world. With the advanced technologies in R&D and manufacturing, IMPACT will be a great platform for experience exchange and acquiring market trends.
IMPACT 2010 as the fifth conference, jointly organized by IEEE CPMT-Taipei, ITRI, IMAPS-Taiwan, Tsing Hua University, SIPO and TPCA, points the theme that Embrace IMPACT, Create Possibilities to bring together researchers, engineers and experts actively engaged in such a distinguished gathering. With the approach of recovery, such a great event looks forward to your paper to trigger off global impact on the earth.
Embrace IMPACT, Create Possibilities...
Date: Wednesday-Friday, October 20-22, 2010
Venue: Taipei Nangang Exhibition Center, Taipei, Taiwan
Conference: The 5th IMPACT Conference
Exhibition: TPCA Show 2010
- Dr. Rolf Aschenbrenner, President of the IEEE-CPMT Board The Fraunhofer IZM in Germany
- Dr. Happy T. Holden, Vice President & chief technical officer Foxconn Technology Group in USA/Taiwan
- Dr. Douglas C.H. Yu, Senior Director Taiwan Semiconductor Manufacturing Company (TSMC)
For questions on paper submission, please contact:
Technical Program Chair
Prof. Hsien-Chie Cheng 鄭仙志
International Microelectronics And Packaging Society (IMAPS-Taiwan)
Technical Program Cochair
Dr. Wei-Chung Lo 駱韋仲
Industrial Technology Research Institute (ITRI)
Requests for information about the symposia should be directed to:
Taiwan Printed Circuit Association
Tel: +886 3 381 5659 #405 (Sylvia Yang)
Fax: +886 3 381 5150
||Membership, Products and Publications
Submit Your IMAPS Awards Nominations ^
This is an urgent appeal from your 2010 Awards Committee Chair to submit your nominations for the following awards – the cutoff date is Aug 27, 2010.
- Corporate Recognition
- Daniel C. Hughes, Jr.
- William D. Ashman
- John A. Wagnon
- Technical Achievement
- Fellow of the Society
- Sidney J. Stein Interglobal
- Lifetime Achievement
- Outstanding Educator
Any IMAPS member may submit a nomination for any IMAPS member but must use the Awards Nomination Form that is available on our website – please navigate as follows: Log in -> Membership -> Society Awards. Eligibility requirements must be considered in making any nominations and these are also available under “Awards”.
Delip Doug” Bokil
2010 Awards Committee Chair
2010 First Past President
Webinar on Component Assurance and Screening
July 14, 21
ATW on Advanced Interconnect Technologies
San Francisco, CA
ATW on Wire Bonding
San Francisco, CA
ATW on High Reliability Microelectronics for Military Applications
August 31 - September 2
ATW on Thermal Management
Palo Alto, CA
*Exhibitors contact firstname.lastname@example.org
IMAPS 2010 - Research Triangle
Oct 31 - Nov 4
*Exhibitors contact email@example.com
ETW on Nano-Integrated Microsystems Packaging:
Design, Materials, Processes and Applications
November 4-5, 2010
Co-located with IMAPS 2010