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January 23, 2013


Button Device Packaging 2013 - Program Available This Week! 6 Booths Remain... (read more...)

Button Upcoming Webinars - Component Chip Attach and Intro to Micro... (read more...)

Button High Temperature (HiTEN 2013) - Abstracts Due Friday. Exhibits, Registration and Sponsorships Now Open (read more...)

   CHAPTER ACTIVITIES (events listed in chronological order)
Bullet TOMORROW: Arizona Chapter January 24 Lunch Meeting with Presentations on the Future of Packaging from Intel and Amkor (read more...)

Bullet San Diego Chapter January 29 Lunch Presentation and Tour at Peregrine Semiconductor (read more...)

Bullet Viking Chapter February 5 Technical Presentations and Facility Tour at Benchmark Electronics in Rochester (read more...)

Bullet Central Texas Chapter's Electronics Design & Manufacturing Symposium Tuesday, February 5 (read more...)

Bullet Northern California Chapter February 6 Lunch Presentation on 2.5D Interposer Fabrication for the Rest of Us (read more...)

Bullet IMAPS France 8th European Advanced Technology Workshop on Micropackaging and Thermal management (read more...)

Bullet 2nd Southeastern Microelectronics Packaging Conference - Registration and Exhibits Filling Fast! (read more...)

Bullet New England Chapter's 40 Symposium & Expo - Call For Papers (read more...)

Bullet Advancing Microelectronics January/February 2013 Magazine Now On-Line - Bumping & Wafer Level Packaging...  (read more...)

Bullet Journal of Microelectronics and Electronic Packaging 3rd Quarter 2012 On-Line - Q4 and Q1 2013 Available Soon  (read more...)


Palomar Technologies

RGL Enterprises
F&K Delvotec


TJ Green Associates, LLC


  IMAPS Events (view full Web Calendar)

Device Packaging 2013 - Program Available This Week! 6 Booths Remain...    ^ Top
IMAPS 9th International Conference and Exhibition on Device Packaging will be held at the Radisson Fort McDowell Resort in Fountain Hills, Arizona from March 11-14, 2013. Visit this week to register, view the program and more. The PROGRAM will be online by the end of this week.

Device Packaging 2012 was another great conference. The exhibit hall sold again for the 7th consecutive year. We saw an increase in attendance with more than 560 participating in 2012. 8x10 exhibit booths are also available - only 6 remain! We are again limited to 65 booths and expect to sell-out EARLY for the 8th consecutive year. Contact Brian Schieman at with any questions or if you wish to speak, attend, sponsor and/or exhibit.

Upcoming Webinars - Component Chip Attach and Intro to Micro...    ^ Top
Upon registering for one of our webinars, IMAPS provides the log-in details for the web software as well as the audio dial-in through your phone. You are able to view the presentation materials over your computer and listen to the live lecture through your phone. You will receive a copy of the slides for each session, and have direct interaction with the instructor.

PDC Webinar Series on Guide to Component Chip Attach - Including Flip Chip
Phillip Creter, Creter and Associates
Tuesday, January 29 and Thursday, January 31, 2013 - 12:00pm-1:00pm EASTERN

PDC Webinar Series on Introduction to Microelectronics Packaging Technology
Phillip Creter, Creter and Associates
Tuesday, February 5 and Thursday, February 7, 2013 - 12:00pm-1:00pm EASTERN

High Temperature (HiTEN 2013) - Abstracts Due Friday. Exhibits, Registration and Sponsorships Now Open    ^ Top
IMAPS International Conference and Exhibition on High Temperature Electronics Network (HiTEN) will be held July 8-10, 2013, at St. Catherine’s College Oxford in Oxford, United Kingdom. Visit to register to attend and to view the program on-line.

The objective of the HiTEN Conference is to have a unique forum that brings together researchers and practitioners in academia and industry from all over the world. All styles of practical high temperature electronics design and implementation approaches are encouraged, along with a variety of high temperature application areas. Today the main semiconductor focus of HITEN is silicon and silicon on insulator (SOI).  Although, HITEN is not simply a semiconductor focused network. HITEN provides a conduit for the exchange and dissemination of information on all aspects of high temperature electronics. It is a global network with users, suppliers, developers and fundamental researchers dealing in all aspects of High Temperature Electronics.

Abstracts are being requested in the following areas:

  • Applications in the Aerospace, Automotive, Oil & Gas, and Geothermal Industries
  • Devices and applications
  • Novel devices
  • ASICs for high temperature applications
  • Memories
  • Passive components
  • Power devices
  • Semiconductor materials
  • Contacts and metallizations
  • Materials
  • Packaging and inter connects
  • Sealants, adhesives, solders
  • Reliability and failure mechanisms
  • Lifetime predictions
  • Accelerated life testing
  • Testing at high temperatures

Those wishing to present a paper at the HiTEN Conference must submit a 200-300 word abstract electronically no later January 25, 2013, using the on-line submittal form at: A Final Manuscript of 6-12 pages, two-column format is due May 31, 2013, for all accepted abstract.

Please contact Brian Schieman by email at or by phone at 202-548-8715 if you have questions.

Accepted papers may be considered for publication in the IMAPS Journal of Microelectronics and Electronic Packaging. All Speakers are required to pay a reduced registration fee and are required to attend the entire Conference to maximize opportunities for interaction with registered attendees. 

Submit Abstract(s)



  Chapter Activities (events listed in chronological order)

TOMORROW: Arizona Chapter January 24 Lunch Meeting with Presentations on the Future of Packaging from Intel and Amkor    ^ Top

Date: January 24, 2013 - Begins at 11:30am

Dobson Ranch Inn
Mesa, AZ


Register on-line by January 22 for $25.00. $30.00 at the door.

Please join us for a Double Feature presentation on the Future of Packaging from Intel and Amkor.

Future of Package for Computing Electronics

Speaker: Dr. Hamid R. Azimi, Intel Corporation

Computing, communication and entertainment media have rapidly converged creating a wide range of "smart" devices, driven by the Internet and the need and desire to be "always connected." New device categories are emerging at a rapid pace to bring computing experiences into every aspect of our lives. Consumers are demanding consistency and interoperability across all of their devices, from phone to PC to tablet to TV to gadget, making computing a seamless experience regardless of where you are, what you are doing or what your needs at the time may be. This computing continuum or convergence is predicted to result in more than 10B connected devices by 2015 with significant challenges and opportunities for microelectronic packaging.

This presentation will focus on explaining these challenges and potential future solutions with regard to increased demand for memory bandwidth, multi functionality, and higher wiring density to meet the Si scaling requirements, thinner and smaller form factors, multi-chip and embedded packaging while also addressing the challenges associated with demand for lower cost and environmental sustainability.

The Future of Packaging: Advanced System Integration

Speaker: Curtis Zwenger, Senior Director, Package Development, Amkor Technology

Future packaging technologies now in the development to deployment phase, must address advanced system integration challenges. As advanced computing, communications and multimedia functions continue to be integrated into handheld devices; electrical and thermal performance have become as critical as form factor and mechanical performance in low cost high volume 3D or chip scale package solutions. To deliver higher performance and integration in high volume / low cost packaging solutions, new process and materials technologies are required, including widespread use of wafer level processing. System integration requirements coupled with fragile silicon nodes and advanced performance requirements place increasing challenges in new package development. This is driving increased collaboration and communication across the supply chain in developing and deploying future packaging technologies.

San Diego Chapter January 29 Lunch Presentation and Tour at Peregrine Semiconductor    ^ Top

Date: January 29, 2013 - at 12:00 PM. Lunch and facility tour after.

Peregrine Semiconductor
Building B 9369 Carroll Park Drive
San Diego, CA 92121


$20.00 for RSVPed IMAPS members. $25.00 for non-members. Free for students with an ID. To register, please contact Dave Virissimo of Coining, Inc at or 619-464-5430

IMAPS San Diego Technical presentation, Peregrine Facility Tour, & lunch.

Space is limited so please sign up quickly!

Silicon On Sapphire; Applications for High Frequency Switches.
Ronald Reedy, Ph.D., Co-Founder and CTO of Peregrine Semiconductor

Peregrine Semiconductor is a fabless provider of high-performance radio frequency integrated circuits or RFICs. The Company’s solutions leverage proprietary UltraCMOS® technology, which enables the design, manufacture, and integration of multiple RF, mixed-signal, and digital functions on a single chip. The Company’s products deliver a leading combination of performance and monolithic integration, and target a broad range of applications in the aerospace and defense, broadband, industrial, mobile wireless device, test and measurement equipment, and wireless infrastructure markets. UltraCMOS® technology combines the ability to achieve the high levels of performance of traditional specialty processes, with the fundamental benefits of standard CMOS, the most widely used semiconductor process technology. UltraCMOS® technology utilizes a synthetic sapphire substrate, a near-perfect electrical insulator, providing low parasitic capacitance and enabling high signal isolation and excellent broadband linearity.

Presenter Bio:
Ron Reedy serves as Peregrine's Chief Technology Officer managing the company's technology activities and intellectual properties. From February 1990 to 2011, he held various positions with Peregrine, including President, Chairman, Chief Executive Officer, Chief Operations Officer, Vice President and Chief of Staff. Prior to joining Peregrine, Dr. Reedy led the microelectronics division at Navy Research and Development. He was engaged in research and development of fiber communications and photonic systems. He is a co-inventor of UltraCMOS® technology. Dr. Reedy received a B.S. and M.S.E.E. from the U.S. Naval Academy and a Ph.D. from the University of California, San Diego.

IMAPS Viking Chapter February 5 Technical Presentations and Facility Tour at Benchmark Electronics in Rochester    ^ Top


February 5


Participants will need to provide photo ID given on-site ITAR regulations.

Benchmark Electronics
3535 Technology Drive NW
Rochester, MN 55901
Local: 507-535-4000


Pre-registration is required by Tuesday, January 29. To register, please contact Dan Johns of Benchmark Electronics at 507-535-4315 or


2:00 Registration, chapter welcome, and overview of Benchmark Electronics.

2:30 Guided Facility Tour.
Tour includes: 1) a walking tour of the printed circuit board assembly area (Note: US Citizenship is required in this area due to ITAR restrictions), 2) systems integration area, 3) design engineering labs, and 4) observation window view of the microelectronics assembly clean room. Tour guide will be Chuck Gilbertson, Product Engineering Manager.

3:30 Brief Break

3:45 “Counterfeit Parts; Their Detection, Mitigation, and Supply Chain Impacts.” Dan Gibbs, Failure Analysis Manager at Benchmark Electronics

4:15 “Case Study: Accuvein Vein Viewer.” David Edmonson PhD., Staff Research and Development Engineer at Benchmark Electronics

4:45 Appetizers and beverages. Event wrap-up. Next chapter events. Other business.

5:30 Event concludes

Presenter Abstracts and Bios:

Dan Gibbs.
“Counterfeit parts; Their Detection, Mitigation, and Supply Chain Impacts.”

Abstract: Counterfeiters are improving their capabilities, such that altered components are nearly indistinguishable from the original package. This presentation discusses counterfeit definitions, supply chain complexities associated with suspect sources, and laboratory tools / methods used to detect counterfeit components from an electronic contract manufacturers perspective. This includes optical inspection (packaging and component), X-ray, XRF, chemical decapsulation, ion chromatography, SEM/EDAX, cross sectioning, solvent, electrical, and solderability testing. In addition, the factors of analysis time, cost, and skill set relative to each tool and method will be covered.

Bio: Dan Gibbs is the Failure Analysis Manager for the Benchmark Electronics - Minnesota Division. His department is a resource for all Benchmark Electronics worldwide divisions. Dan has 20 years of experience in the electronics assembly industry. This includes a variety of positions in analytical / conformance testing, Six Sigma, and quality assurance management. Dan received a Bachelor of Science degree from Winona State University in 1991.

Dr. Dave Edmonson.
“Accuvein Vein Viewer.”

Abstract: Dermal layers and subcutaneous fat are rather transparent in the infrared region of the spectrum. In contrast (literally) blood, both oxygenated and non-oxygenated, exhibits strong absorption. Since blood is concentrated in the veins and arteries this differential absorption phenomenon can be used to highlight the location of the veins in particular, since they are closer to the skin surface. The presentation will discuss how Benchmark Electronics developed and produced a commercial handheld device from a crude prototype. The presentation will provide both an overview of how the device functions and then note the subsystems that were created and packaged to achieve the final design.

Bio: Over the past 10 years at Benchmark Electronics Inc., Dr. Edmonson has been developing equipment and processes for many hybrid assembly products ranging from data storage to medical implants. More recently, Dr. Edmonson has worked on optical hybrid devices and medical instruments; most of these required some sort of hybrid assembly process using mixed technologies. Specific processes include alignment of single mode fibers to lasers, lenses, gratings and attachment processes. Most required customized test systems and the creation of performance criteria for data analysis.

Central Texas Chapter's Electronics Design & Manufacturing Symposium Tuesday, February 5    ^ Top


2:00 Registration Begins

2:30 CTEA Welcome. Specialty Coating Systems Factory Overview

2:35 Specialty Coating Systems Factory Tours

3:35 "Parylene Coating Technology Update.” Dr. Rakesh Kumar, Vice President of Technology of Specialty Coating Systems

4:05 "Before & After Reflow Characterization of FCBGA Voiding Utilizing High Resolution CT Scan, X-ray (2D & 3D) Imaging, and Cross Section with Digital Imaging." Gordon O’Hara, Process Engineering Manager at Flextronics

4:35 Brief Break

4:50 "Overview of Copper Wire Bonding Technology.” Andrew Mawer, Packaging Analysis Lab Manager at Freescale Semiconductor

5:20 "Protecting Intellectual Property (IP)." Robert Villhard, Intellectual Property Attorney at The Villhard Patent Group

5:50 Closing Remarks

6:00 Bar-B-Q Dinner sponsored by Specialty Coating Systems

Please contact Bob Baker at to register. Advance registration is helpful. There is no charge for this event - through the generous sponsorship by Specialty Coating Systems.

Specialty Coating Systems
1130 Rutherford Lane, #260
Austin, Texas (between I-35 & Cameron Rd)

IMAPS Northern California Chapter February 6 Lunch Presentation on 2.5D Interposer Fabrication for the Rest of Us    ^ Top


February 6:
11:30 AM – 12 PM Registration & Networking
11:30 AM – 12:15 PM Buffet Luncheon
12:15 PM – 1:00 PM Speaker Presentation


David's Restaurant, Banquet & Conference Facilities
5151 Stars & Stripes Drive
Santa Clara, CA 95054


IMAPS Members $25.00; Non-members $30.00;
Students (with ID) $15.00

Price includes lunch and program. Please email Roger Underwood, IMAPS NorCal Treasurer, at before COB Monday February 4, 2013 to guarantee your lunch. SPACE IS LIMITED! Registrations will be confirmed via e-mail. We only accept cash and checks at the door.

2.5D Interposer Fabrication for the Rest of Us
Terrence C. Caskey, Ph.D. Senior Director, Invensas Corporation

Abstract: TSMC has emerged in the last 18 months as the leader in 2.5D Interposer fabrication and integration. They have gathered their considerable resources in support of 2.5D Interposer fabrication and assembly including both CoWoS (Chip on Wafer on Substrate) as well as CoCoS (Chip on Chip on Substrate) schemes. However, the question repeated at every industry conference and panel discussion is whether we are destined to have a single source solution for 2.5D technology or whether it will be possible for others to develop, refine, and commercialize competitive 2.5D solutions. We (Invensas Corp) believe that the business imperatives will require the latter approach and have been working on the development of 2.5D Interposer technology with our partners at Allvia for some time. In this presentation Dr. Caskey will present an overview of his development activities as they pertain to fine node interposer solutions. He will also review the common technical pitfalls and challenges in this type of development and will speak to the barriers of entry related to interposer development and commercialization.

IMAPS France 8th European Advanced Technology Workshop on Micropackaging and Thermal management    ^ Top

Date: February 6-7, 2013

Quai Louis Prunier 17000 La Rochelle France
Tel : 33 (0) 5 46 50 61 50/Fax : 33 (0) 5 46 41 24 31
Email :


Early Registration ends on January 11, 2013
Final Registration ends on January 31, 2013
« Formulaire de Convention de formation sur demande »

Organized by:
International Microelectronics And Packaging Society France
49 rue Lamartine 78035 Versailles
Tel : + 33 (0) 1 39 67 17 73/ Fax : + 33 (0) 1 39 02 71 93
E-mail :

The Workshop will present improvements in thermal management materials, components and systems, to provide innovative packaging and cooling solutions for highly integrated power, RF, microwave and other devices and subsystems.

Increases in functionality, complexity, miniaturisation, operating temperature and power output will require advances in thermal solutions at many levels, for military, aerospace, consumer and industrial systems. Industry transition to SiC and GaN devices allows higher operating temperatures with higher heat flux but also greater reliability; these trends also require improvements and changes in packaging and thermal materials. Thermal management has been clearly identified, in industry technology roadmaps worldwide, as a crucial constraint in packaging at all levels.

CONFERENCES SCHEDULE (Provisional as of November 27, 2012)

FEBRUARY 6, 2013 (Wednesday)
09.00 am Opening address: J.M.Yannou, President of IMAPS-France

09.15 am Thermal Storage Nanocapsules
R. Rodriguez Alonso, Inasmet Tecnalia (Spain)

Chairs: J.M. Yannou ASE / W. Eckhard, ECPE

10.00 am Miniaturized Frictionless Fan Concept for Thermal Management of Electronics
R. Schacht, Lausitz University of Applied Sciences, Fraunhofer Enas,
Joint lab Berlin (Germany)

10.25 am Enhanced Boiling Heat Transfer on Micromachined Surfaces Using Acoustic Actuation
A. Glezer, Georgia Institute of Technology (United States)

10.50 am Coffee Break/ Table Top Exhibition

Chairs: P. Lewandowski, Continental Automotive / M. Mermet Guyennet Alstom

11.15 am Industrial Application of Cold Spray and Use of this Technology for
Thermal Management
S. Hartmann, Obz Innovation GmbH (Germany)

11.40 am Thermal Management Materials and Cooling Solutions Made by Rapid Hot Pressing and Rapid Sinter Pressing
E. Neubauer, Rhp Technology GmbH (Austria)

12.05 pm Approach for Finding a Proper Golden-Reference Sample for TIM Tester Calibration
A. Vass-Varnai, Mentor Graphics (Hungary)

12.30 pm-02.00 pm Lunch

Chairs: J. Lallier, Thales / S. Feneyrou, Zodiac Aerospace

02.00 pm Application of Complex Thermal Impedance for Multilayer Thermal Structure
B. Wiecek, Technical University of Lodz (Poland)

02.25 pm Thermal Resistance Simulation and Measurement of a Double Sided Cooled
Power Module
S. Kraft, Fraunhofer IISB (Germany)

02.50 pm Experimental Investigation of High Density Folded Fin Structures for
Electronics Cooling Applications
A. Engelhardt, Thermacore Europe (United Kingdom)

03.15 pm Practical Evaluation of CFD Models for Heat Sink Design in Photonic System
O. Wittler, Fraunhofer Berlin (Germany)

03.40 pm Coffee Break/ Table Top Exhibition

Chairs: N. Chandler, BAE Systems / B. Braux, Astrium

04.15 pm Theoretical Study of the Thermal Impact of a Passive Heat Spreading Layer Integrated in 3D Mobile Device
S. Salman, CEA, LETI, (France)

04.40 pm An Integrated Passive Cooling Solution for PCB Substrates
D. Kearney, J. Griffin, ABB Corporate Centre, (Switzerland)

05.05 pm Developments and Applications for Thermal Core PCBs
D.L. Saums, DS&A LLC (United States)

05.30 pm End of Session

08.00 pm Dinner « Salle de l’Oratoire » 6 rue Albert 1er La Rochelle

FEBRUARY 7, 2013 (Thursday)

Chairs: C. Sarno, Thales Avionics / M. Massiot, EGIDE

09.00 am Analysis of Thermal Management Techniques in Tablets
E. Rahim, Electronic Cooling Solutions (United States)

09.25 am Autonomous Cooling for Embedded Computer –New Concept
B. Bellin, Thales Avionics (France)

09.50 am Thermal Management of a 49W Computer Processing Unit with a 23W Hotspot
J. Carcone, Airbus Opérations SAS (France)

10.15 am Loop Heat Pipe for the Thermal Management of Hot Spots in Future
Electronic Equipments
R. Hodot, Thales Avionics (France)


Chairs: D. Saums DS&A LLC / B.Wiecek Technical University of Lodz

11.15 am Thermal Properties of Carbon Material Reinforced Aluminium Composite Fabricated by Hot Pressing with Semi-Liquid Existent Phase
H. Kurita, ICMCB-CNRS (France)

11.40 am Copper/Diamond Composite Materials for Thermal Management Applications
T. Guillemet, ICMCB-CNRS,(France)

12.05 pm Thermally Conductive Encapsulants –Balancing Critical Properties
P. Hough, Lord Corporation (Germany)

12.30 pm – 2.00 pm Lunch

Chairs: R. Seddon, Inasmet Tecnalia / J.L Diot, Novapack SAS

02.00 pm Silicon Nitride Substrates for Power Electronics
U. Voeller, Curamik Electronics GmbH (Germany)

02.25 pm MEMPHIS: Miniaturized Electronic Module for Power and Hermetic Innovative
Applications In harSh Environment
D. Baudet, B. Braux Astrium (France)

Chairs: R. Seddon, Inasmet Tecnalia / J.L Diot, Novapack SAS

02.50 pm Parametric Transient Thermo-Electrical PSPICE-Model for a Power Cable
R. Schacht, C. Gerner Fraunhofer ENAS (Germany),The Lausitz University of Applied Sciences

03.15 pm Cooling Device Libraries Development for Surrogate Models in Modelica and
VDHL-AMS Languages
D. Lossouarn, EPSILON (France)

03.40 pm End of session / Final Coffee / Departure

2nd Southeastern Microelectronics Packaging Conference - Registrations and Exhibits Filling Fast!    ^ Top

Date: February 28, 2013

Rosen Centre Hotel
9840 International Drive
Orlando, FL 32819


Register On-Line
Please email Doug Bokil - with questions

The objective of the Florida Chapter Microelectronics Symposium is to provide a forum that brings together experts from science, academia, design, manufacturing and business to discuss the latest advances and emerging applications in microelectronics and high density packaging.


Patrick Simpkins, Director of Engineering
NASA's John F. Kennedy Space Center in Florida
Dr. Patrick Simpkins is the director of Engineering at NASA's John F. Kennedy Space Center in Florida. In this position, Simpkins leads a group of engineers from multiple disciplines in the design, development and operations of spaceflight hardware and ground systems assigned to the Kennedy Space Center.

Professional Development Course (PDC) on WIRE BONDING:

9AM - 12 NOON
Conducted by Lee Levine who is an expert on this topic & has conducted a similar PDC for IMAPS


1PM - 5PM

DNA Marking to Assure Product Authenticity
Janice Meraglia, Applied DNA Sciences

Additive Manufacturing of Fine Lines and Embedded Electronics for use in Chip Packaging and Microelectronic Systems
Scott Lauer, AdvantechUS, Inc.

Predicting the Reliability of Zero-Level TSVs
Greg Caswell, Dfr Solutions, LLC

Low Temperature Sintering Silver Paste Using MO Technology
Ken Araujo, NAMICS Technologies, Inc.

Rediscovering Multilayer Rigid-Flex with Z-interconnect Technology
Rabindra Das, Endicott Interconnect Technologies, Inc.

Cyberfacturing and the 3rd Industrial Revolution
Mike Newton, Newton Cyberfacturing, LLC

Design Optimization of Micro-channel Heat Exchanger embedded in LTCC
Aparna Aravelli, University of Miami

A Novel Approach to Interconnect Redistribution on Singulated Die
David Herndon, Harris Corporation

3 - 8:30PM

Please contact Doug Bokil - if you have questions.


New England Chapter's 40 Symposium & Expo - Call For Papers    ^ Top

Date: Tuesday May 7th, 2013

Holiday Inn Boxborough Woods Conference Center
Boxborough, Massachusetts


Please send 250 word abstract to: Jim McLenaghan, AJM@Creyr.NET for more details visit us at:

Abstract Deadline has passed -- contact Jim asap with questions

For details about Sponsoring, Exhibiting or Attending Contact Harvey Smith: or Call 508-699-4767


Symposium Technical Chair
A. James (Jim) McLenaghan, Creyr Innovation, LLC

The Largest Regional Symposium Dedicated to Microelectronics and Packaging

Tuesday May 7th, 2013
----- Featuring -----
Six to Eight Lecture Sessions, Full Poster Session,
Employment Center & 80 Booth Exhibit Hall

The New England Chapter Symposium Technical Program Committee seeks papers that demonstrate how new technologies and applications are expanding and redefining microelectronics. Areas of interests include:


  • Medical Electronics
  • Lasers
  • Telecom – RF & Microwave
  • Military Electronics
  • Consumer Electronics
  • Renewable Energy: Fuel Cells, Solar, Wind
  • Thermal & Power Management
  • Manufacturing, Outsourcing & Quality
  • Software and Firmware Applications
  • High Performance Interconnects and Boards
  • Sensors (Manufacturing & Applications)
  • Emerging Technologies
  • Solar, Photovoltaic
  • Aerospace
  • Electronics for Environmental Impact Measurement & Assessment

Advanced Processes & Materials

  • 3D, SiP, and High Density Packaging
  • Nano Materials - Mfg., Applications, & Safety
  • Photonics, Optoelectronics, LED Packaging
  • MEMS and Nano Packaging
  • Underfill - Materials, Applications, Effectiveness
  • Green packaging - Regulation Compliance, Materials, Processes, Recycling
  • Flip-Chip and Bumping Processes & Reliability
  • Wire-bonding and Stud-Bumping
  • Embedded Components – Passives, Magnetics
  • Ceramic, Polymer and Conductive Materials
  • Cu, Low-K
  • Product DFR & DFM Tools, Programs, Implementation
  • Materials Deposition & Delivery - Print, Vapor, Dispensing, Placement, etc


  Membership Corner

Advancing Microelectronics January/February 2013 Magazine Now On-Line - Bumping & Wafer Level Packaging...   ^ Top

January/February 2013:
Volume 40, No. 1
Bumping & Wafer Level Packaging

The January/February 2013 issue featured four technical articles on: A Short History of Flip Chip and Wafer Level Packaging; A Brief History of Electroplating for Bumping and Wafer Level Packaging; Wafer Level Chip-Scale Packaging: Evolving to Meet a Growing Application Space; and Embedded Wafer-Level Packaging is Expected to Increase by 2015, Once Platforms Mature and Fabless Customers Commit

download magazine PDF (10mb)

Journal of Microelectronics and Electronic Packaging 3rd Quarter 2012 On-Line - Q4 and Q1 2013 Available Soon   ^ Top

Journal of Microelectronics
and Electronic Packaging

(ISSN # 1551-4897)

Volume 9, Number 3
Third Quarter 2012

download pdf of full Journal - 58mb



Die-Attach Technologies for Ultraviolet LED Multichip Module Based on Ceramic Substrate
T. Burkhardt, M. Hornaff, A. Acker, T. Peschel, E. Beckert, R. Eberhardt, and A. Tünnermann, Fraunhofer Institute for Applied Optics and Precision Engineering IOF; T. Burkhardt and A. Tünnermann, Friedrich-Schiller-University Jena; K.-H. Suphan, Micro-Hybrid Electronic GmbH; K. Mensel and S. Jirak, Lastronics GmbH


Design and Fabrication of an LTCC Structure for a Microceramic Combustor
Darko Belavic, Marko Hrovat, Kostja Makarovic, and Marina Santo Zarnik, Centre of Excellence NAMASTE; Darko Belavic, HIPOT-RR; Darko Belavic, Marko Hrovat, Gregor Dolanc, Kostja Makarovic, and Marina Santo Zarnik, Jozef Stefan Institute; Marina Santo Zarnik, IN.Medica

Inkjet Printing of Multilayer Capacitors
D. Jeschke, E. Ahlfs, and K. Krüger, Institute of Automation Technology Helmut-Schmidt-University and University of the Federal Armed Forces Hamburg

Aerosol Printing of High Resolution Films for LTCC-Multilayer Components
Martin Ihle, Uwe Partsch, Sindy Mosch, and Adrian Goldberg, Fraunhofer Institute for Ceramic Technologies and Systems


Cold Embossing of Ceramic Green Tapes
Anja Härtel, Hans-Jürgen Richter, and Tassilo Moritz, Fraunhofer Institute of Ceramic Technologies and Systems

Automated Complex Permittivity Characterization of Ceramic Substrates Considering Surface-Roughness Loss
A. Ege Engin and Pavithra Pasunoori, San Diego State University



LORD Corporation


Crane AE Banner


2013 Events:

Southeastern Microelectronics Conference
February 28

Device Packaging
March 11-14
*Exhibitors contact

CICMT (Ceramics)
April 22-24
*Exhibitors contact

New England Chapter 40th Symposium & Expo
May 7

HiTEN (High Temp)
July 8-10
*Exhibitors contact

IMAPS 2013 (Orlando)
September 29-Oct. 3
*Exhibitors contact

^ Top





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