Program:

3:00  Networking, opening remarks, and introductions. 

3:30  Alain Briancon of NTERA
           “Printed Electro-chromic Displays: Technology and Applications.”

4:00 Diganta Das of the University of Maryland
           “"Counterfeit Electronics - It is not Only a Components Issue"

4:30 Break

4:45 Dimos Katsis of Athena Energy, LLC
            “Power electronic inverter packaging.”

5:15  Susheel Dharia of Kyocera America
             "Material Trade-offs in Designing Ceramic Packages."

5:45 Dinner (teriyaki chicken), Closing Remarks, and Chapter Business (elections)
 
6:15 Optional Tour
The tour will cover a small volume, prototyping microcircuit facility with substrate fabrication and microelectronics assembly clean rooms ranging from 100,000 to 1,000 ppm classification.  The substrate fabrication capabilities include a number of common supporting technologies including thin film deposition and etching, surface and bulk micromachining, micro plating, fine-line photolithography, laser machining and diamond saw dicing.  MEMS fabrication and post-processing capabilities have recently been expanded.  The microelectronic assembly capabilities include die attach, wire bonding, flip chip bonding for area array packaging, package sealing and specialized test and probing equipment. 

 

Registration:

On-line Registration has closed
You must register on-site for this event

Registration Closes: 5pm EDT on October 23, 2009
Cost: IMAPS members - $ 20.00.  Non-members - $ 30.00.  Students – $ 5.00

Event Location:

Applied Physics Laboratory of Johns Hopkins University
11100 Johns Hopkins Road
Laurel, MD 20723
Click here for map and directions
Enter in the area marked Lobby 1 and check-in Bruce Romenesko

Tour requires a one week (COB Monday, October 19) advance registration for non-US citizens.
Please e-mail bruce.romenesko@jhu.apl.edu with name, company, and country of citizenship.