International
Conference and Exhibition on
Device Packaging
www.imaps.org/devicepackaging
Doubletree Hotel
Scottsdale, Arizona USA
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Device
Packaging General Chairs:
Ted Tessier, FlipChip International
Andrew Strandjord, FlipChip International |
Device
Packaging Technical Chairs:
Beth Keser, Freescale Semiconductor
Jon Aday, Amkor Technology Inc. |
Conference and Technical Workshops
March
20-23, 2006
|
Exhibition and Technology Showcase
March
21-22, 2006 |
Professional
Development Courses
March 20, 2006 |
GBC
Spring Conference
March
19-20, 2006 |
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Exhibit
Information | Exhibiting Companies | Floorplan | Reserve
Booth(s)
GBC Spring Conference 2006
The Second Annual Device Packaging Conference (DPC 2006) is being held
in Scottsdale, Arizona on March 20 - 23, 2006. It is an international event
being organized and sponsored by the International Microelectronics And
Packaging Society (IMAPS).
The Device Packaging Conference
will feature keynote speakers, technical sessions, professional development
courses, and a vendor exhibition and
technology showcase. The conference aims to provide
a focused forum to hear and discuss the latest technological developments
in 5 topics
areas
related to microelectronics packaging: Optoelectronics; MEMS; Flip
Chip Technologies; Copper/Low-K; and 3D Packaging. Technical presentations
in
these 5 topical areas will range from early stage design work and
R&D,
to systems manufacturing and production operations. The professional development
courses which are offered, as well as the vendor exhibition and technology
showcase, are also focused on the microelectronics and packaging aspects
of these 5 topical areas and should provide a very valuable added resource
to people attending the conference. The Global Business Council (GBC) will
be offering a stellar Spring Conference, March 19th & 20th which will
focus on the business side of these technologies (see the next page).
There will also be several networking receptions and gatherings throughout
the
week, including the opening receptions, meals and other social events.
This conference is a major forum for the exchange of knowledge and provides
numerous opportunities to network and meet leading experts in these 5 fields.
The conference was organized to attract a fairly diverse group of people,
across many different functional groups and experience levels within both
industry and academics. People who would benefit from this conference include:
scientists, process engineers, product engineers, manufacturing engineers,
professors, students, business managers, sales, and marketing.
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Welcome Reception
(Device
Packaging Conference)
Monday, March 20th
5:30 pm – 7:30 pm
GBC Attendees are Invited!
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$100 Discount
when
you register for the
Device Packaging Conference &
the Global Business Council
Conference (GBC)
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TUESDAY,
MARCH 21
Keynote Presentation & Technical Sessions
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OPTOELECTRONICS
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MEMS
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FLIP CHIP
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COPPER/LOW-K
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3D
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7:00 am - 7:00
pm
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Registration
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7:00 am - 8:00
am
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Breakfast
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8:00 am - 8:45
am
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Keynote Presentation
Electronics Packaging
Jim Fusaro, Amkor Technology
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9:00 am - Noon
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TA1
Optoelectronics - Interconnects
and Data Transmission
Chair: Ephraim Suhir, University of California at Santa Cruz
and Nanoconduction, Inc.
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TA2
MEMS - Sensors and Devices
Chair:
Bruce Romenesko, John Hopkins University
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TA3
Flip Chip - Wafer
Bumping Technologies
Chair:
Guy Burgess, FlipChip International LLC
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Copper
and 3D Sessions
begin on
Wednesday, March 22nd.
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9:00 am
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Dual
Coated Optical Glass Fiber Subjected to Pull-Out Force
Ephraim Suhir, University of California at Santa
Cruz and Nanoconduction, Inc.
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Porous
Ceramic Packaging for MEMS Chemical Sensors Requiring Environmental
Access
Robert Dean, Nicole Sanders,
Jeremiah Pack,Phil Reiner, Auburn University
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C4NP - First
Manufacturing & Reliability Data for High-End FlipChip
Solder Bumping Based on IBM's
C4NP Process
Klaus Ruhmer, Emmett Hughlett,
SUSS MicroTec, Inc.; Dietrich Toennies, SUSS MicroTec - Germany; Peter Gruber, IBM
Microelectronics, TJ Watson Research Center
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9:30 am
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Liquid Crystal Polymer Molded QFN Package for Microwave and Millimeter Wave
Applications
Kunia Aihara, Anh-Vu Pham, University
of California at Davis; John
W. Roman, RJR Polymers Inc.
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A
Planar MEMS-Based Solid State Propellant Micro-Rocket with
Micro-Igniter Micromachined on a Thin SiO2/SiNx Membrane
Amar Chaalane, C. Rossi,
X. Dollat, L. Jalabert, D. Estève, LAAS-CNRS
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High
Speed Electrodeposition of Lead-Free Solder Bumps for Wafer
Level Packaging
Zhenqiu Liu, Jim (Zhongqin)
Zhang, Bill Wu, Arthur Keigler, NEXX Systems
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10:00 am
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Building
a Packaging Hierarchy for Optical Interconnects using Polymer
Waveguides: Exploring the Options
Stephen L. Buchwalter,
Russell Budd, Frank R. Libsch, Bert Offrein, Yoichi Taira, IBM Corporation
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MEMS
Inertial Sensors and Wafer-Level Packaging
Changhan Hobie Yun, T. Lor,
J. Villarreal, Analog Devices Inc.
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Production
Feasiblity of Electrodeposition of Tin-Silver-Copper for
Wafer Bump Applications
Rozalia Beica, Eric Chiu,
Angelo Chirafisi, Rohm and Haas Electronic Materials,
L.L.C.
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10:00 am - 7:30 pm
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Exhibition & Technology Showcase
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10:30 am
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Break in Exhibit Hall
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11:00 am
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Embedded
Thermoelectric Devices for Optoelectronic and Other High-Flux
Cooling Applications
David A. Koester, Bob Conner,
Randy Alley, Marco Soto, Nextreme Thermal Solutions,
Inc.
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A
New Test Device for Characterization of Mechanical Stress
caused Packaging Processes
Soeren Hirsch, Bertram Schmidt, University
of Magdeburg
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Process
Integrity of Lead-Free Solder Bumping for Reliable Flip
Chip Interconnects
Hirokazu Ezawa, Kazuhito
Higuchi, Masaharu Seto, Masayuki Uchida, Toshiba Corporation
Semiconductor Company
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Copper
and 3D Sessions
begin
on
Wednesday,
March 22nd. |
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11:30 am
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Model LCP-Based
Packages for Optoelectronic Devices
Raymond Pearson, Rajesh
R. Gomatam, Jessica Goodell, John P. Coulter, Lehigh University
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Leadless
Chip Carrier for Microwave MEMS Packaging
Rick Sturdivant, MPT, Inc.
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Lead
Free Wafer Bumping Techniques with Solder Paste
Richard R. Lathrop, Heraeus
Incorporated-Circuit Materials Division
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Noon - 1:00 pm
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Lunch in the Exhibit Hall
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OPTOELECTRONICS
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MEMS
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FLIP CHIP
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COPPER/LOW-K
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3D
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1:00 pm - 3:00
pm
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TP1
Optoelectronics - Reliability
Chair: Stephen L. Buchwalter, IBM Corporation
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TP2
MEMS - Assembly and Packaging
Chair:
Robert Dean, Auburn University
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TP3
Flip Chip -
Future Directions in Wafer Bumping
Chair:
Robert Darveaux, Amkor Technology
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Copper
and 3D Sessions
begin
on
Wednesday,
March 22nd.
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1:00 pm
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Liquid
Crystal Polymer (LCP) based
Opto and Electronic Packaging with Functionally Hermetic
Performance
Linas Jauniskis, Foster-Miller,
Inc.
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Characterization
of Strain Gauges Fabricated by Serigraphic Method
Bruno Luis Soares de Lima,
Ana Neilde da Silva Rodrigues, Nilton Itiro Morimoto,
Laboratório de Sistemas Integráveis, USP
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Stencil
Printing Technology for Fine Pitch Deposition of Pb-Free
Flip Chip Interconnects
Robert Kay, E. deGourcuff,
I. Roney, N. J. Gorman, MicroStencil Limited
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1:30 pm
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Integrated
Wafer Level Technology with Chip on Board Process Enables
Higher Yields and Reduced Costs for Optical Devices
Yehudit Dagan, Vage Oganesian,
Gil Perlberg, Osher Avsian, Shellcase Ltd. |
Achieving
and Maintaining High Vacuum Levels In MEMS Packages
David Muhs, Paul Barnes,
SST International
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SAC
Low Voiding Pb-Free Solder Paste Optimization
Guy F. Burgess, FlipChip
International, LLC
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2:00 pm
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Optimizing
Interactions in Optoelectronic Packaging
John S. Mazurowski, Pennsylvania State University |
A
Cost-Effective Chip Scale Packaging
Guohong He, Discera Inc.
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Experimental
Study of Void Formation in Solder Joints of Flip-Chip Assemblies
Daijiao Wang, GrafTech International
Ltd.; Ronald L. Panton, The University of Texas at Austin
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2:30 pm
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Low
Temperature Wafer-Scale Thin Film Encapsulation for RF
MEMS
Gilles Poupon, Charlotte
Gillot, Emanuelle Lagoutte, Jean Louis Pornin, Nicolas
Sillon, CEA-LETI
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Current
Challenges in Flip Chip Packaging Technology
Robert Darveaux, Miguel
Jimarez, Amkor Technology
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3:00 pm
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Break in Exhibit Hall
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4:00 pm - 6:00
pm
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TP4
Optoelectronics - Packaging
Adhesives and Analysis
Chair: Raymond Pearson, Lehigh University
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TP5
MEMS - Wafer Bonding
Chair:
Changhan Hobie Yun, Analog Devices Inc.
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TP6
Flip Chip -
Lead Free Bumping
Chair:
Ted Tessier, FlipChip International LLC
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4:00 pm
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Evaluating
the Dimensional Stability of Optoelectronic Adhesives
Raymond Pearson, Thomas
Daugherty, Lehigh University
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Investigations
of Anodic Bonding for MEMS Wafer Level Package Applications
Hsueh-Kuo Liao, Hsieh-Shen
Hsieh, Cheng-Chang Lee, Hwang-Kuen Chen, Tai-Kang Shing,
Delta Electronics, Inc.
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Investigation
and Analysis on Ball Shear Strength using Sn-Ag-Cu Solder
Alloy on Electroless Nickel-Gold Under Bump Metallization
Elsie A. Cabahug, Erwin
Ian V. Almagro, Benjie B. Hornales, Fairchild Semiconductor
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4:30 pm
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Multilayer
Adhesive Bonding under Hot Air Stream
Daniela Andrijasevic, Walter
Smetana, Ioanna Gioroudi, Werner Brenner, Krzysztof Malecki,
Vienna University of Technology
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A
Package Sealing Technique for Mercury Filled Microfluidic
Devices
Daniel Harris, Robert Dean,
Omkar Nadgauda, Nicole Sanders, Charles Ellis, Mike Palmer, Auburn University
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Geometry
and Bond Improvements for Wire Ball Bonding and Ball Bumping
Daniel D. Evans, Jr., Palomar
Technologies
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5:00 pm
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Discoloration
Kinetics of Epoxy Encapsulant Materials under Thermal and
UV Treatment
Yuan-Chang Lin, Yan Zhou,
Y. Z. He, Frank G. Shi, University
of California, Irvine
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Direct
Bonding of SU-8 Cavities over MEMS Components
Donald W. Johnson, Milind
P. Nagale, Joseph Molea, Michael Hornung, Volkan Cetin,
MicroChem Corp.
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Ultrasonic
Horn Design Considerations for 100 Bump I/O Devices
Philip Couts, T. Nishioke,
E. Onda, TDK Corporation of America
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5:30 pm
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Failure
Analysis of LED using Magnetic Field Current Mapping
Sean Kim, Miky Lee, Craig
Hillman, DFR Solutions
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An
Investigation of Focused Ion Beam Deposition as a Microjoining
Technique
Gerald A. Knorovsky, J.
R. Michael, B. L. Boyce, K. G. Janssens, P. C. Galambos,
Sandia National Laboratories
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Reliability
of Gold-Solder Bump Joint
Yong-Bin Sun, Jae-Yun Kim, Kyonggi University
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6:00 pm - 7:30
pm
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Reception in the Exhibit
Hall
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Conference Registration
Advance Rate Ends:
February 15, 2006
Exhibit Booth Deadline:
February 15, 2006
Register
Today
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WEDNESDAY,
MARCH 22
Keynote Presentation & Technical
Sessions
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OPTOELECTRONICS
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MEMS
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FLIP CHIP
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COPPER/LOW-K
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3D
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7:00 am - 6:00
pm
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Registration
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7:00 am - 8:00
am
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Breakfast
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8:00 am - 8:45
am
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Keynote Presentation
Wafer Level 3D Integration:
A Status Report
Philip Garrou, Research Triangle Institute & TechSearch
International, Inc.
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9:00 am - 5:00
pm
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Exhibition & Technology Showcase
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9:00 am - Noon
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WA1
MEMS & Optoelectronics
- Waveguides and Subassemblies
Chair: Dan Popa, University of Texas at Arlington
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WA2
Flip Chip -
Materials
Chair:
Roupen Keusseyan, DuPont Electronics
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WA3
3D Packaging
- Wafer Bonding
Chair:
James Jian-Qiang Lu, RPI
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9:00 am
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Modular
Microassembly System for MEMS Packaging
Dan Popa, Manoj Mittal,
Rakesh Murthy, Jeongsik Sin, Harry Stephanou, University
of Texas at Arlington
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Dielectric
Property Measurement, RF Performance and Reliability Characterization
of Underfill and Glob Top Materials for Microwave Flip-Chip
Interconnects
David Ihms, David Zimmerman,
Michael E. Miller, Deepukumar Nair, Matthew Walsh, Delphi
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System
in Package Combining Flip Chip Bonding and 3-D Stacking
using a Highly Flexible Device Bonder
Gilbert Lecarpentier, SUSS
MicroTec; Serguei Stoukatch, IMEC
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9:30 am
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Fluxless
Soldering for Hermetic Packaging of MOEMS
Abiodun Fasoro, Dan O. Popa,
Amit Patil, Woo Ho Lee, Jeongsik Sin, Heather Beardsley,
Harry E. Stephanou, Dereje Agonafer, Automation & Robotics
Research Institute
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Novel
Techniques for Inspection and Failure Analysis of Mounted
and Underfilled Flip Chip Devices
Roger M. Devaney, HI-Rel
Laboratories
|
A
New Breed of High Volume Wafer Processing Equipment In
Situ Aligned Wafer Bonding Systems for 3D Integration
Gilbert Lecarpentier, SUSS
MicroTec; Klaus Ruhmer, Dan Pascual, SUSS MicroTec, Inc.
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10:00 am
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Advances
in MEMS-Based, In-Package Fiber Aligners
Jason T. Iceman, Raymond
A. Pearson, Richard P. Vinci, Svetlana Tatic-Lucic, Lehigh University
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Interfacial
Reaction between Sn3.0Ag0.5Cu Solder Bump Wrapped with
Sn57Bi1Ag and Various Pad
Si-Suk Kim, Dong-Chun Lee,
Seong-Chan Han, Heui-Seog Kim, Kwang-Su Yu, Jae-Hun Choi,
Hyo-Jae Bang, Samsung Electronics
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Wafer
Level Temporary Bonding/Debonding for Thin Wafer Handling
Applications
Koen De Munck, Lieve Bogaerts,
Deniz S. Tezcan, Piet De Moor, Bart Swinnen, Kris Baert,
Chris Van Hoof, IMEC
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10:30 am
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Break in Exhibit Hall
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11:00 am
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Monolithic
vs. Hybrid Integration for Optoelectronic Integrated Circuits
Kenneth Pedrotti, University of California, Santa
Cruz |
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Techniques
of Collective Interconnection and Assembly of a Bolometers
Focal Plane for Space Application
Jean-Louis Pornin, P. Agnese,
A. Beguin, F. Simoens J.C. Cigna, A. Vandeneynde, CEA - LETI; J.Martignac, L. Rodriguez, CEA-Saclay/SAP
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Evaluation
of Adhesive Wafer Bonding and Processes for 3D Die Stacking
using TSV Technologies
Sudhakar Kukarni, Edward
Prack, Leonel Arana, Yiqun Bai, Intel Corporation
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11:30 am
|
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Ceramic
Microwave/Millimeter-Wave IC Packaging
Rick Sturdivant, MPT, Inc.
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Direct
Wafer Bonding Technology Applied to 3D Integration on Silicon:
Recent Results at LETI
L. Di Cioccio, B. Charlet,
B. Biasse, M. Kostrzewa, M. Zussy, J. Dechamp, M. Migette,
M. Vinet, C. Lagaye, B. Aspar, J. M. Fedeli, T. Poiroux,
R. Guerrieri, R. Canegallo, N. Kernevez, CEA-Grenoble
LETI
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Noon - 1:00 pm
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Lunch in Exhibit Hall
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OPTOELECTRONICS
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MEMS
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FLIP CHIP
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COPPER/LOW-K
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3D
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1:00 pm - 3:00
pm
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WP1
MEMS - Assembly and Applications
Chair:
Ajay Malshe, University
of Arkansas
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WP2
Flip Chip -
Underfill & Materials
Chair:
Robert L. Hubbard, Lambda Tech. Inc.
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WP3
3D - Stacked Die
Chair: Markus Wimplinger, EV Group
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1:00 pm
|
Innovative
MEMS Application in High Power Circuit Breaker
Bruce C. Kim, Rahim Kasim, University
of Alabama
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The
Optimization of Underfill Properties and Process Conditions
for a Molded Flip-Chip SIP Package
Zhengjue (Jack) Zhang, Michael
Buckley, Chris Perabo, Michael Todd, Henkel Technologies
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Electrical
Interconnects for 3D Wafer Stacks
Praveen Pandojirao-Sunkojirao,
Ping Zhang, Rachita Dewan, Dan O. Popa, Harry E. Stephanou,
J.-C. Chiao, The University
of Texas at Arlington
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1:30 pm
|
Evaluation
of a Low-Temperature Glass Frit for Wafer-Level Packaging
Daniel N. Pascual, SUSS
MicroTec
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High
Thermally Conductive and High Reliability Underfill
Yukinari Abe, Kazuyoshi
Yamada, Osamu Suzuki, Namics Corporation
|
A
Heterogenous System-in-Stack Technology Incorporating Area-Array
Interconnects, Thermal Management and Integrated Passives
Jon Stern, Volkan Ozguz,
James Yamaguchi, Irvine Sensors Corp.; Paul Franzon,
Steven Lipa, Stephen Mick, North Carolina State University;
Leonard Schaper, Ajay Malshe, Michael Glover, Matthew
Kelley, University of Arkansas; Ari Glezer, Yogendra
Joshi, Georgia Institute of Technology
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2:00 pm
|
Advanced
Photodefinable Thermosetting Fluorinated Polymer for Microelectronics
Application
Takeshi Eriguchi, Masahiro
Ito, Kaori Tsuruoka, Asahi Glass Co. Ltd.
|
Characterizing
Disbond Initiation Resistance of Underfill-Polyimide Interfaces
Raymond Pearson, Brian J.
McAdams, Lehigh University
|
Stacked
Die Bond Wire Optimization in a 3D Design Environment
Gordon Jensen, CAD Design
Software
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2:30 pm
|
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Low
Temperature Curing of Epoxies with Microwaves
Robert L. Hubbard, Iftikhar
Ahmad, Lambda Technologies, Inc.
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3:00 pm
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Break in Exhibit Hall
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4:00 pm - 6:00
pm
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WP4
Flip Chip -
Materials II
Chair:
Andrew Strandjord, FlipChip International LLC
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WP5
Copper/Low-K - Wirebonding
Chair:
George G. Harman, NIST
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WP6
3D - Throughhole Metallization
and Etch
Chair: Markus Wimplinger, EV Group
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4:00 pm
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Effect
of Underfill Material Properties on Low k Dielectric, First
and Second Level Interconnect Reliability
Mudasir Ahmad, Sue Teng,
Jie Xue, Cisco Systems, Inc.
|
An
Overview of the Materials and Processes Necessary to Interconnect
Copper Low-k Chips
George G. Harman, NIST
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Latest
Developments in DRIE for Integration of Passive Components
and Wafer-Level Packaging
Michel Puech, B. Andrieu,
L. Popin, N. Launay, N. Arnal, P. Godinat, JM Gruffat,
Alcatel Vacuum Technology
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4:30 pm
|
Impact
of Substrate Material and Solder Bump Alloys on ILD Stress
in Flip Chip Packages
Brett Wilkerson, Trent Uehling,
Tim Pham, Torsten Hauck, Freescale Semiconductor, Inc.
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Low
K Ball Grid Array 44um Pitch Wire Bonding Process Development
Tu Anh Tran, Sonder Wang, Cuckoo
Du, Nick Vo, Chu-Chung (Stephen) Lee, M.C. Han, Freescale
Semiconductor, Inc.
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Cutting-Edge
Electrodeposition Technologies for 3D Chip Integration
Bioh Kim, Jim Rychwalski,
Dan Schmauch, Semitool, Inc.
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5:00 pm
|
Assembly
and Reliability of Ultrathin Flip Chips on Flexible Substrates
Barbara Pahl, Christine
Kallmayer, Rolf Aschenbrenner, Herbert Reichl, Fraunhofer
Institute of Reliability and Microintegration IZM
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Optimization
of the Wire Bonding Process on Low-k Pad Structures
Jon W. Brunner, Bob Chylak,
Kulicke and Soffa Industries, Inc.
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Copper
Plating Techniques for Through Wafer Vias
Sergey Savastiouk, ALLVIA,
Inc.; Larry Moresco, DFX Solutions, Inc.
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5:30 pm
|
Capillary
Underfill Flow Modeling and Void Mechanism for Flip Chip
Packages
Sung-won Moon, Chunho Kim,
Intel Corporation
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Via-First
Inter-Wafer Vertical Interconnects Utilizing Wafer-Bonding
of Damascene-Patterned Metal/Adhesive Redistribution Layers
Jian-Qiang Lu, J. J. McMahon,
R. J. Gutmann, Rensselaer Polytechnic Institute
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Hotel Cut-off:
February 10, 2006
Doubletree Paradise Valley Hotel
Single/Double - $199
Reserve
Rooms On-line.
|
|
