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5th International Conference and Exhibition on
Device Packaging

Radisson Fort McDowell Resort and Casino
Scottsdale/Fountain Hills, Arizona USA

Conference and Technical Workshops
March 10-12, 2009
Exhibition and Technology Showcase
March 10-11, 2009
Professional Development Courses
March 9, 2009
GBC Spring Conference
March 8-9, 2009

FEBRUARY 6, 2009

In conjunction with the Global Business Council (GBC) Spring Conference, March 8-9
$100 discount if attending both Device Packaging and GBC

Courtesy of FlipChip International, LLC

Courtesy of Rensselaer Polytechnic Institute
General Chair:
Ted Tessier
FlipChip International
Chief Technical Officer
Technical Co-Chair:
Christo Bojkov
Freescale Semiconductor
Technical Co-Chair:
Linda Bal
Freescale Semiconductor
Technical Co-Chair:
Robert Dean
Auburn University
Technical Co-Chair:
Peter Tortorici
Medtronic Microelectronics Center
Technical Co-Chair:
Beth Keser
Freescale Semiconductor
Technical Co-Chair:
Gene Dunn
Panasonic Factory Solutions Company
Technical Co-Chair:
James J.-Q. Lu
Rensselaer Polytechnic Institute
Technical Co-Chair:
Lou Nicholls
Amkor Technology
Technical Co-Chair:
Victor Bright
University of Colorado at Boulder
Technical Co-Chair:
Steve Adamson
Technical Co-Chair:
Andrew Strandjord
Pac Tech USA
Technical Co-Chair:
Dave Saums

Technical Program

Technical Program-at-a-Glance

Sunday Global Business Council (GBC) Spring Conference

GBC Spring Conference | Device Packaging Professional Development Courses (PDCs):

Area Array Microelectronics Package Reliability (PDC 1) | 3D Integration: Technology, Applications & Markets for 3D Integrated Circuits (PDC 2) | High-Performance Thermal Management Materials (PDC 3) | Package on Package (PoP) Applications, Requirements, Infrastructure and Technologies (PDC 4) | Fundamentals of Packaging of MEMS and Related Microsystems and Nanomanufacturing (PDC 5) | 3D Integration and Packaging Technologies, Assessment, Status and Applications (PDC 6) | Implementing Flip Chip Technology (PDC 7) | Hermeticity Testing, RGA and Near Hermetic Packaging Concepts (PDC 8)

Tuesday Morning: 3D Integration and Through-Si-Vias (TSVs) –1 | Polymer & Laminated MEMS | Flip Chip Process & Reliability | Active and Passive Thermal Management Techniques for Packaged LEDs
Afternoon: 3D Market, Cost and Applications | MEMS Devices | Advanced Flip Chip & Bumping Technologies | Power LED Device Attachment Methods, Processes, and Analysis
Evening Panel Discussion: 3D Integration Technologies, Applications, and Roadmaps
Wednesday Morning: 3D Integration and Through-Si-Vias (TSVs) - 2 | Processing & Assembly | New Developments in Wafer Level Packaging Materials | Materials & Components: Substrates, Optics, Cooling & LED Standardization Tutorial
Afternoon: Interactive Poster Session | 3D Design, Thermal, Electrical and Evaluation | Advanced Concepts | Wafer Level Packaging Reliability and Modeling
Evening Panel Discussion: Wafer Level Packaging
Thursday 3D Chip Packaging Technology and Applications | Packaging, Test & Reliability | Processes and Innovations in Biomedical Applications


12:00 pm

12:00 Noon – GBC Golf Tournament
Details available soon
We-Ko-Pa Golf Club -- Scottsdale/Ft McDowell, AZ

6:00 pm - 7:00 pm


6:00 pm

GBC Welcome Reception
(Beverages and appetizers)


7:00 am -
7:00 pm

GBC and Device Packaging Registration

7:00 am -
8:00 am

Continental Breakfast

8:00 am -
5:00 pm

8:00 am - Noon

Morning Professional Development Courses (PDCs)
* Click on PDC title to see full description *

PDC1 -
Area Array Microelectronics Package Reliability


PDC2 - 
3D Integration: Technology, Applications & Markets for 3D Integrated Circuits

Instructor: Philip Garrou
Microelectronic Consultants of NC

PDC3 –
Philip Garrou, Microelectronic Consultants of NC

Instructor: Carl Zweben
Thermal Management Materials Consultant

PDC4 –
Package on Package (PoP) Applications, Requirements, Infrastructure and Technologies

Instructor: Moody Dreiza
Amkor Technology

10:00 am - 10:20 am


12:00 pm - 1:00 pm

Only provided for those attendees registered for both Morning and Afternoon PDCs

1:00 pm - 5:00 pm

Afternoon Professional Development Courses (PDCs)
* Click on PDC title to see full description *

PDC5 -
Fundamentals of Packaging of MEMS and Related Microsystems and Nanomanufacturing

Instructor: Ajay Malshe
University of Arkansas (HiDEC-MEEG)

PDC6 –
3D Integration and Packaging Technologies, Assessment, Status and Applications
Instructor: James J.-Q. Lu
Rensselaer Polytechnic Institute

PDC7 –
Implementing Flip Chip Technology
Instructor: R. Wayne Johnson
Auburn University

PDC8 - 
Hermeticity Testing, RGA and Near Hermetic Packaging Concepts


3:00 pm - 3 20 pm


5:00 pm - 7:00 pm

Welcome Reception (Device Packaging)

Welcome Reception
(Device Packaging Conference)

Monday, March 9th
5:00 pm – 7:00 pm

GBC Attendees are Invited!

$100 Discount

when you register for the
Device Packaging Conference &
the Global Business Council Conference (GBC)

Morning Technical Sessions





7:00 am - 6:30 pm


7:00 am -
8:00 am

Continental Breakfast

8:00 am –
12:00 pm

3D Integration and Through-Si-Vias (TSVs) – I

Chairs: James Lu, Rensselaer Polytechnic Institute; Peter Ramm, Fraunhofer IZM

Polymer & Laminated MEMS

Chairs: Lienhard Pagel, University of Rostock; Robert Dean, Auburn University

Flip Chip Process & Reliability

Chairs: Lou Nicholls, Amkor Technology, Inc.; Lars Boettcher, Fraunhofer (IZM)

Active and Passive Thermal Management Techniques for Packaged LEDs

Chairs: Gene Dunn, Panasonic Factory Solutions Company of America; John Pan, Cal Poly State University

8:00 am –
8:30 am

The Evolution to 3D IC Integration Philip Garrou, Microelectronic Consultants of NC

Laser Structured Printed Circuit Boards - Application and Characteristics
Roland Schoenholz, Wuerth Elektronik; Mathias Nowottnick, University of Rostock

Plasma Treatment for Improving Flip Chip Underfill Performance
Scott D. Szymanski, March Plasma Systems

Thermal Design and Management of High Power LEDs
Norbert Engelberts, Advanced Thermal Solutions Europe

8:30 am –
9:00 am

Supply Chain Activities for 3D TSV Integration
Rozalia Beica, SEMITOOL, Inc.

Fluidic Systems in Printed Circuit Board Technology
Lienhard Pagel, Stefan Gassmann, University of Rostock

Managing the Underfill Process for Large Die
Steven J. Adamson, Dan Ashley, Asymtek

Enabling New LED Designs through Advanced Cooling Technology
Raghav Mahalingam, Nuventix, Inc.

9:00 am –
9:30 am

New 3D Interconnection Method by using Wet Etching Technology
T akanori Maebashi, Natsuo Nakamura, Yutaka Sacho, Shigeto Nakayama, Eiri Hashimoto, Shinjiro Toyoda, Nobuaki Miyakawa, Honda Research Institute Japan

Pressure Sensor in Printed Circuit Board Technology
Martin Hämmerle, Sauter AG; Lienhard Pagel, University of Rostock

Impact of Underfill Fillet Design on Package Reliability
Brett Wilkerson, Mike Fuller, Shim Kar Wei, Freescale Semiconductor, Inc.

Low Cost Copper Tungsten Heat Sinks Made by Near Net Shape Infiltration
Ken Kuang, Bill Ishii, Torrey Hills Technologies, LLC; Danny Zhu, Jiangsu Dingqi Science & Technology; Guosheng Jiang, Changsha Saneway Electronics Materials

9:30 am –
10:00 am

High Insulating Through Silicon Via Integration in 200V SOI Applications
Cyrille Laviron, Brendan Dunne, Pietro Erratico, Paola Galbiati, Antonella Milani, Fabrizio Toai, CEA-LETI, MINATEC; David Henry, Astrid Astier, Valérie Lapras, Thomas Magis, Antonio Roman, STMicroelectronics

Improvements of a PCB Technology for Micro Fluidic Devices
Stefan Gassmann, Lienhard Pagel, University of Rostock

A Tin-Silver Alloy Electroplating Process for Flip Chip Interconnect
Yu Luo, Michael Toben, Stephen Christian, Randy Chang, Jianwei Dong, Vivian Li, Neil Brown, Rohm and Haas Electronic Material, LLC

Classifying, Understanding, and Applying Thermal Interface Materials for Power LED Applications and Related Devices
David L. Saums, DS&A LLC

10:00 am –
6:30 pm

Exhibition and Technology Showcase

10:00 am –
11:00 am

Break in Exhibit Hall

11:00 am –
11:30 am

Simultaneous Copper Electroplating of TSV and RDL Formations on Wafer 3D Structures
Robert S. Forman, Rohm and Haas Electronic Materials; Steve Christian, Jeffery Calvert, Rohm and Haas Emerging Technologies R&D

Optimal Process Parameters and Approaches using Structuration of Low Temperature Cofired Ceramics (LTCC) for MEMS Devices
K. Suhas, BMS College of Engineering

Latest Developments in Bumping Technologies for Flip Chip and WLCSP Packaging
Dionysios Manessis, Lars Boettcher, Andreas Ostmann, Herbert Reichl, Technical University Berlin/Fraunhofer IZM Berlin

Thermal Resistance Characterizations on Chip On Board LED Packaging
Adrien Gasse, Sebastien Labau, Stéphane Bernabe, Philippe Grosse, Hervé Ribot, CEA LETI Minatec

11:30 am –
12:00 pm

Delivering Cost Effective Wafer Level and 3D Packages with TSV
Moshe Kriman, Bents Kidron, Giles Humpston, Tessera

Polymer MEMS/PCBMEMS and Packaging for Multi Parameter BioTag Systems in the Environment
David Fries, Heather A. Broadbent, Stanislav Z. Ivanov, University of South Florida

Analysis of BGA Solder Joint Reliability for Selected Solder Alloy and Surface Finish Configurations
Hugh Roberts, Sven Lamprecht, Christian Sebald, Atotech; Mark Bachman, John Osenbach, Kishor Desai, LSI Corporation; Ron Huemoeller, YoonHa Jung, Robert Darveaux, Amkor Technology


12:00 pm – 1:30 pm

Lunch In The Exhibit Hall
(Food served from 12:00 pm – 1:00 pm)



Afternoon Technical Sessions





1:30 pm –
5:30 pm

3D Market, Cost and Applications

Chairs: Philip Garrou, Microelectronic Consultants of NC; Leonard W. Schaper, University of Arkansas

MEMS Devices

Chairs: Charles Ellis, Auburn University; Robert Dean, Auburn University

Advanced Flip Chip & Bumping Technologies

Chairs: Linda Bal, Freescale Semiconductor Inc.; Hugh Roberts, Atotech

Power LED Device Attachment Methods, Processes, and Analysis'

Chairs: Genevieve Martin, Philips Applied Technologies; Dave Saums, DS&A LLC

1:30 pm –
2:00 pm

3D TSV Interconnects: A Market Analysis
Eric Mounier, Yole Développement
A MEMS-Based Gas Sensor for Detecting the NOx of Automobile Exhaustion Gas
Jung-Sik Kim, Jin-Ho Yoon, University of Seoul

The Impact of Advanced Materials on FCBGA Package Reliability and Performance Enhancement
Sasanka Kanuparthi, Nokibul Islam, Amkor Technology

Addressing Thermal Issues during Device Packaging and Assembly using Dispense Processes
Robert Hoffman, Steve Adamson, Horatio Quinones, Asymtek

2:00 pm –
2:30 pm

Cost Effective Approach to 3D Integration with iTSV™
Paul Siblerud, EMC3D; Mark Scannell, CEA/LETI; Juergen Wolf, Peter Ramm, Fraunhofer IZM; Manuel Soriaga, Texas A&M; Tom Ritzdorf, Rozalia Beica, SEMITOOL; Markus Wimplinger, EV Group; Suk-Jin Ham, Yoon-Chul Sohn, SAMSUNG; Kyung W. Paik, KAIST; Fred Roozeboom, NXP
Piezoelectric Acoustic Emission Sensor Array for High Impact Characterization
Michael Kranz, Michael Whitley, Tracy Hudson, Stanley Associates, Inc.

Chip Joining of High End Flip Chip Organic Packages - Interconnect Pitch Reduction Challenges
David Danovitch, Pascal Blais, Valerie Oberson, IBM Canada Ltd.

Bonding a LED Substrate to a Heat Slug: More than a Matter of Low Thermal Resistance
Kees C. Slob, Abdelhakim El Hasnaoui, Marc de Samber, Hans de Vries, Philips Applied Technologies; Jeff Kmetec, Frank Wall, Li Zhang, Philips Lighting Lumileds

2:30 pm –
3:00 pm

Development of Second Generation 3D Devices
Robert Patti, Tezzaron Semiconductor Corporation
Development of Bioprobe Integrated with Microneedle for Cellular Function Analysis
Norihisa Kato, Takayuki Shibata, Takahiro Kawashima, Takashi Mineta, Eiji Makino, Toyohashi University of Technology

Assessment of Impact of Alpha Emissivity of Packaging Materials on the Soft Error Rate of Flip Chip Devices
Peng Su, Li Li, Rick Wong, Shi-Jie Wen, Cisco Systems, Inc.

Room Temperature Soldering of Temperature-Sensitive Surface Mount High Power LED Packages to Heat Sinks
Ramzi Vincent, Zhaojuan He, Ellen Heain, Michael Baum, David Van Heerden, Reactive NanoTechnologies Inc. (RNT)

3:00 pm –
4:00 pm

Break in Exhibit Hall

4:00 pm –
4:30 pm

3D Integration Technologies For Miniaturized Tire Pressure Monitor System (TPMS)
Nicolas Lietae, Maaike M. V. Taklo, Armin Klumpp, SINTEF; Peter Ramm, Fraunhofer IZM

Development of Vertical Integration of MEMS Inertial Sensors and Devices
Philip J. Reiner, Stanley Associates Inc.

Coreless Substrate Assembly & Reliability
Jon G. Aday, Steven Lee, Nokibul Islam, Amkor Technology Inc.

Thermal Performance of High Power Light Emitting Diodes: Die Attach Material and Bond-line Thickness Dependence
Bohan Yan, J. P. You, Y. H. Lin, Frank G. Shi, University of California-Irvine

4:30 pm –
5:00 pm

3D Packaging for Image Sensor Application
M. J. Wolf, A. Klumpp, R. Wieland, K. Zoschke, M. Klein, L. Nebrich, A. Heinig, W. Weber, I. Limansyah, P. Ramm, H Reichl, Fraunhofer IZM
Fabrication and Control of an Electrostatically Levitated Rotating Gyro
Charles D. Ellis, Bogdan M. Wilamowski, Auburn University
Ultra Fine Pitch Bumping using e-Ni/Au and Sn Lift-off Processes
Andrew J.G. Strandjord, Thorsten Teutsch, Jing Li, Thomas Oppert, Elke Zakel, Pac Tech USA - Packaging Technologies

Chip-on-Board Packaging and Thermal Solutions for 100W Single Large Area LED
Jay Liu, Daxi Xiong, Paul Panaccione, Luminus Devices, Inc.

5:00 pm –
5:30 pm

Development of High Die Count Spacerless Film based NAND Stacked Chip Scale Packages
Gunaranjan Viswanathan, J. H. Yoon, Robert Aubuchon, Harry Wu, Ying Long Song, Intel Corp.; J. B. Yu, Roger St. Amand, Amkor Technology, Inc.
Tunable Millimeter-Wave Device Based on Waveguide-Packaged MEMS
Jan Hesselbarth, Ruediger Vahldieck, ETH Zurich
The Solution of Crack Issue at Boundary Surface between FC (Flip Chip) Substrate and Underfill in Various Semiconductor Packaging Conditions
Cheol-Ho Choi, Dong-Yeon Lee, Chang-Kyu Choi, Young-Sik Choi, Samsung Electro-Mechanics

Thermal Management for LED Pico Projection Module
Yong Chi, Scott S. L. Chen, Chen-Jung Tsai, Enboa Wu, Hong Kong Applied Science & Technology Research Institute

5:30 pm –
6:30 pm

Reception In The Exhibit Hall

6:30 pm –
8:00 pm

3D Panel Discussion: 3D Integration Technologies, Applications, and Roadmaps
Topics will cover 3D technology platforms (SiP, PoP, Die-Stack, Die-Wafer, Wafer-to-Wafer, and Device-by-Device), unit processing technologies and equipment/material capabilities, and future trends and technology drivers (applications and benefit).

Moderators: James J.-Q. Lu, Rensselaer Polytechnic Institute; Christo Bojkov, Freescale Semiconductor, Inc.


Morning Technical Sessions





7:00 am -
6:30 pm


7:00 am -
8:00 am

Continental Breakfast

8:00 am –
12:00 pm

3D Integration and Through-Si-Vias (TSVs) - II

Chairs: Paul Siblerud, SEMITOOL; Thorsten Matthias, EVGroup

Processing & Assembly

Chairs: Nick Barbosa, NIST; Phil Reiner, Stanley Associates Inc.

New Developments in Wafer Level Packaging Materials

Chairs: Beth Keser, Freescale Semiconductor; Luu Nguyen, National Semiconductor

Materials & Components: Substrates, Optics, Cooling
AND LED Standardization Tutorial

Chairs: Frank Wall, Philips Lumileds Lighting Company; Dave Saums, DS&A LLC

8:00 am –
8:30 am

Critical Factors of Cu TSV Electrodeposition
Rozalia Beica, SEMITOOL, Inc.

MEMS Bonding with Polymers
Keith A. Cooper, Sharon Farrens, Sumant Sood, SUSS MicroTec

Lithographic Process Optimization of a Low Temperature Curable Epoxy-Based Dielectric for Wafer Level Advanced Packaging
Eric Huenger, Craig Franklin, Rohm and Haas Electronic Materials; Warren Flack, Ha-Ai Nguyen, Ultratech

Benchmark Study of Metal Core Thermal Laminates
Glenn E. Oliver, Kurt Roberts, Dan Amey, DuPont Electronic Technologies

8:30 am –
9:00 am

Evaluation of Seed Layer Coverage in High Aspect Ratio Trenches and Through Silicon Vias (TSV) using 300-mm Advanced Directional Sputtering (ADS)
Patrick Carazzetti, Clemens Frick, Christian Linder, Oerlikon Systems

Selective Heating and Cooling for Processing of Advanced PCB Assemblies
Mathias Nowottnick, Ashraf Ansari Shaik Mohammad, Trinh Dung Bui, Kiran Babu Matta, University of Rostock

Next Generation Photoresist Removal Technology for Wafer Level Packaging
Cass Shang, DuPont WLP Solutions

Thermoplastic Solutions for Opto-Electronics Packaging
Scot MacGillivray, Matrix Incorporated

9:00 am –
9:30 am

Integrated Materials Enabling TSV/3D
Toshi Itabashi, DuPont WLP Solutions

Unique Application of CO2 Cryogenic Aerosol Cleaning for Particle Removal in MEMS and Packaging Fabrication Processes
Paul Cheng, C. Bowers, A. Campbell, J. Zhuge, J. Rodriguez, S. Askin, I. Varghese, M. Balooch, W. Brandt, Eco-Snow Systems LLC

Processing and Performance of AL Polymer Films for Wafer Level Packaging
Alan Huffman, Jeff Piascik, RTI International; Phil Garrou, Microelectronic Consultants of NC; Jay Im, University of Texas-Austin

Development of High Performance Optical Silicone for the Packaging of High Power LEDs
Yeong-Her Lin, Jiun Pyng You, Frank G. Shi, University of California-Irvine

9:30 am –
3:00 pm
Exhibition and Technology Showcase

9:30 am –
10:00 am

Break In Exhibit Hall

10:00 am – 10:30 am

Lithography and Wafer Bonding Solutions for 3D Integration
Thorsten Matthias, Bioh Kim, Markus Wimplinger, Paul Lindner, EV Group

Controlled Latching in Sequential Assembly of 3D MEMS
Nader S. Shaar, Carol Livermore, George Barbastathis, Massachusetts Institute of Technology

Solder Brace Coatings for Wafer-Level Chip Scale Packaging
Candice Brannen, Russell Stapleton, LORD Corporation

Heat Pipe Cooling Technology and Its Potential Benefits to the LED Industry
Doreen M. Fulmer, Advanced Cooling Technologies, Inc.

10:30 am – 11:00 am

Substitute presentation available soon

Compliant Constant Force Microgripper for Microassembly and Micromanipulation
Mohammad Sadegh Hajhashemi, Farshad Barazandeh, Hady Parsaiyan, Amirkabir University of Technology; Mohammad Reza Hajihashemi, University of Arkansas

Studies of Cu Etchrate Variation in Dry-Film Photoresist Remover Containing Tetramethylammonium Hydroxide
David Maloney, DuPont WLP Solutions

Practical Guidelines for Vapor Chamber Applications for Power LED and Related Device Packaging
George A. Meyer IV, Celsia Technologies; Dave Saums, DS&A LLC

11:00 am – 11:30 am

High Accuracy Placement, and In-Situ Reflow or Thermo-Compression Bonding Enabling High Density and Fine Pitch in 3D-IC with Chip to Wafer Bonding Approach, Illustrated by an Application using Micro-Insertion
Gilbert Lecarpentier, François Marion, SET, Smart Equipment Technology; Jean Stephane Mottet, CEA-LETI

Compact Square Patch Antenna for Mobile Application
Mohamed Ismaeel, T. Jayanthy, A. S. A. Nisha, Aiswarya Shaji, Sathyabama University
An Investigation of Diffusion Barrier Characteristics of Electroless Co(W,P) Layer to Lead-Free SnBi Solder
Hung-Chun Pan, Tsung-Eong Hsieh, National Chiao Tung University
Embedded Tutorial (60 minutes)
11:00 am – 12:00 pm

Challenges of LED Thermal Standardization
Clemens J.M. Lasance, Andras Poppe, Philips Research Laboratories

11:30 am – 12:00 am


Enhance Solder Ball Shear Test Value in WLCSP
Dyi-Chung Hu, K. S. Liu, Smith Chen, Ferry Hu, Advanced Chip Engineering Technology Inc.

12:00 am –
1:00 pm

Lunch In The Exhibit Hall

1:30 pm –
2:55 pm

Interactive Poster Session
In The Exhibit Hall: 1:30 pm – 2:55 pm
(Poster Presenter Setup - 1:00pm - 1:30 pm)

RF and Thermal Analysis of Packaged TGA4046 Q Band Amplifier
Bruce Blaser, Peter Heisen, Boeing

Electrochemical Migration on Lead-Free Soldering of PCBs
Luiz Tadeu Freire Mendes, Valtemar Fernandes Cardoso, Ana Neilde Rodrigues da Silva, LSI-PSI-EPUSP

Design of Tunable Filter Structures using Multilayer Low Temperature Cofired Ceramics (LTCC)
K. Suhas, M. N. Suma, BMS College of Engineering

Enabling Through Silicon Vias with Co-Designed Materials
Pat Starrs, DuPont WLP Solutions

Photolithography in Vertical Vias for 3D TSV Application
Daniel Figura, EV Group

Transient and Steady State Thermal Performance Evaluation of Stacked Die Designs in QFN Packages
Victor Chiriac, Freescale Semiconductor Inc.

Ultra Thin Wafer Dicing- Minimizing Costs and Maximizing Die Break Strength
Paul Kirby, Peter Pirogovsky, ESI

Low Cost Prototype Miniaturization by using Folded Flex
Henna Heinilä, Pekka Heino, Tampere University of Technology

Microbump Creation System for 3D Advanced Packaging Applications
Chester E. Balut, Andy Ahr, DuPont Electronic Technologies; Alan Huffman, RTI International

High-Quality LTCC Solenoid Inductor Using Air Cavity on Silicon Wafer for 3D Integrated Circuit
Hyun-Cheol Bae, Kwang-Seong Choi, Jong-Tae Moon, Ju-Yeon Hong, Seung-Hyeub Oh, Yong-Il Jun, Electronics and Telecommunications Research Institute

Improvement in Stencil Printing for the Higher Quality of Bumps
Yong-Kwan Lee, Naum B. Feygenson, Samsung Electro-Mechanics Co.

Novel Packaging Via Solder Joints at Chip Edges
Cai Liang, Wayne Buckhanan, David Kopp, Ryan Savino, Jason Kulick, Michael Padberg, Andrew Carter, Gregory Snider, Patrick Fay, Gary H. Bernstein, University of Notre Dame

A Numerical Study on Optimization of Stresses Occurred During Chip to Wafer Bonding in Vacuum
Krzysztof Malecki, Tomasz Falat, Ewa Tarczkowska, Gernot Bock, Gerhard Hillmann, Alfred Sigl, Norman Marenco, Kazimierz Friedel, Wroclaw University of Technology

Low Cost Ownership of WLCSP Interconnection
Young Do Kweon, Seungwook Park, Jinsoo Kim, Heekon Lee, Jonghwan Baek, Sung Yi, Samsung Electro-Mechanics Co., Ltd.

2nd Level Reliability Improvement on WLCSP
Seungwook Park, Jinsoo Kim, Hyungjin Jeon, Jongyun Lee, Job Ha, Jonghwan Baek, Youngdo Kweon, Sung Yi, Samsung Electro-Mechanics Co., Ltd.

A Unique Process for Hermetic Wafer Level Packaging
Joel Goodrich, M/A-COM Technology Solutions

Thin Film, Flexible Intravascular Ultrasound Catheter Device with Fine-Pitch Soldered Flip Chip Interconnect
Frank D. Egitto, V. R. Markovich, W. E. Wilson, R. Magnuson, S. Desai, Endicott Interconnect Technologies, Inc.; G. R. Westby, J. H. Adriance, Unovis Solutions; C.N. Angelucci, International Micro Industries, Inc.

FlexBio: The Potential of Flexible Electronics in Biology and Medicine
James N. Turner, Binghamton University

Generation of Voids in Pb-Free Plating after Annealing
E. Jan Vardaman, Tim Lenihan, TechSearch International, Inc.; Issei Fujimura, Ishihara Chemical Co., Ltd.


Afternoon Technical Sessions




2:30 pm –
6:20 pm

3D Design, Thermal, Electrical and Evaluation

Chairs: Sitaram Arkalgud, SEMATECH; Christo Bojkov, Freescale Semiconductor, Inc.

Advanced Concepts

Chairs: Tracy Hudson, U. S. Army RDECOM AMRDEC; Nick Barbosa, NIST

Wafer Level Packaging Reliability and Modeling

Chairs: Andrew Strandjord, Pac Tech USA - Packaging Technologies; Eric Huenger, Rohm and Haas Electronic Materials

2:30 pm –
3:00 pm

Thermal Test Vehicle Integration of 3-D VLSI
Yang Liu, Len Schaper, Susan Burkett, University of Arkansas

3-D Micro Electromagnetic Radio Frequency Systems (3D MERFS)
Gil Potvin, Dan Fontaine, Dejan Filipovic, David Sherrer, BAE Systems

Delivering High Reliability from a Wafer-Scale, Chip-Sized Package Incorporating a Through Silicon Via Solution
Moshe Kriman, Bents Kidron, Giles Humpston, Tessera

3:00 pm –
3:30 pm

Thermal Management and Performance Optimization of 3-D Microelectronics System
Victor Chiriac, Freescale Semiconductor Inc.

RF MEMS Hybrid Package Testing
Daniel Hyman, David DeRoo, XCOM Wireless, Inc.

Amkor’s CSPnl™: Comparison of Bump on Pad and Cu Redistribution WLCSP Designs
Rex Anderson, T. Y. Tee, R. Chilukuri, H. S. NG, C. P. Koo, B. Rogers, Amkor Technology

3:30 pm –
4:00 pm

Exposing Dies for Failure Analysis in Stacked Die Packages by Micro-Abrasive Blasting
Stefan Martens, Horst Theuss, Walter Mack, Friedemann Voelklein, Juergen Wilde, Infineon Technologies AG

Near Hermetic Wafer Level Packaging using LCP Adhesive Layer
Cody Moody, Brandon Pillans, Andrew Malczewski, Raytheon

Thermal Reliability Performance of Large Area WLCSP Arrays
Umesh Sharma, Phil Holland, Harry Gee, California Micro Devices

4:00 pm –
4:20 pm

Break in Foyer

4:20 pm –
4:50 pm

Electrical Characterization of High Count, 10 µm Pitch, Room-Temperature Vertical Interconnections
François Marion, Damien Saint Patrice, Manuel Fendler, Hervé Ribot, CEA - LETI; Gilbert Lecarpentier, Joseph Macheda, SET S.A.S. (Smart Equipment Technology)


Development of Micro/Nano-Enabled Flexible Thermal Ground Plane
Y. C. Lee, Bo Shi, Christopher Oshman, Aziz Abdulagatov, Myongjai Lee, Virginia Yong, Dae Up Ahn, Ching-Yi Lin, Wei Wang, Jen-Hau Cheng, Chen Li, Ronggui Yang, Victor Bright, Steven George, G. P. "Bud" Peterson, University of Colorado at Boulder

Thermo-Electromigration Induced Failure in WL-CSP Pb-Free Solder Joints
Luhua Xu, S. W. Liang, Di Xu, K. N. Tu, Stephen Gee, Luu Nguyen, Marshall Andrews, University of California - Los Angeles

4:50 pm –
5:20 pm

Can Current EDA Packaging Tools Meet the Demands of Ever-Changing 3D Packaging Technologies?
Gordon Jensen, John Sovinsky, CAD Design Software

Development of Nanostructured Wick-based Passive Heat Spreaders for Thermal Management of Radio Frequency Electronic Devices
David Altman, Justin Weibel, Suresh Garimella, Jayathi Murthy, Timothy Fisher, Sungwon Kim, Youssef Habib, Jason Nadler, Tianhong Cui, Ram Ranjan, Raytheon Integrated Defense Systems

A Simple Test-Data-Driven Lead-Free Solder Joint Fatigue Life Prediction Model
Weidong Xie, Kuo-Chuan Liu, Cisco Systems, Inc.

5:20 pm –
5:50 pm

Achieving Higher Efficiency in Complex IC Package/SiP Design through 3D DFM Integration with Manufacturing Systems
Keith Felton, Cadence Design Systems Inc.; Paul Reid, Kulicke & Soffa Inc.

Large Scale Integration of MEMS Switches in Monolithic Millimeter-Wave Antenna-Arrays Platform
Chih-Chieh Cheng, Abbas Abbaspour-Tamijani, Arizona State University

CTE-Matched Wafer-Level Coldplates
Gregory I. Rudd, Kalista Kusnadi, Rob Brox, Spectra-Mat, Inc.; Alan Grantz, Grantz Engineering

5:50 pm –
6:20 pm



System Level Thermal Performance Optimization of Wafer Level CSP Designs
Victor Chiriac, Freescale Semiconductor Inc.

6:30 pm – 7:30 pm

Wafer Level Packaging Panel Discussion
WLP reliability has been a topic of considerable interest and discussion as the usage of this highly space efficient packaging option proliferates. We are fortunate to have some of the most prominent WLP technology experts in the industry participating in this conference. This panel discussion will serve as a forum for the sharing of WLP best known practices and reliability expectations of particular interest to DPC attendees that make, sell or use WLP technologies in their products.


Technical Sessions




7:00 am –
11:30 am


7:00 am –
8:00 am

Continental Breakfast

8:00 am –
12:00 pm

3D Chip Packaging Technology and Applications

Chairs: Flynn Carson, STATS ChipPAC; C. J. Berry, Amkor Technology

Packaging, Test & Reliability

Chairs: Flynn Carson, STATS ChipPAC; C. J. Berry, Amkor Technology

Processes and Innovations in Biomedical Applications

Chairs: Peter Tortorici, Medtronic Microelectronics Center; Steven Adamson, Asymtek

8:00 am –
8:30 am

Magnetic Self-Assembly of Multiple Component Types from a Heterogeneous Mixture of Parts
Sheetal B. Shetye, Ilan Eskinazi, David P. Arnold, University of Florida

Electrode Integrated Wafer-Level Packaging for Out-of-Plane MEMS Devices
Kuan-Lin Chen, Shasha Wang, Renata Melamud, Thomas W. Kenny, Stanford University

Precision Coating and Adhesive Dispensing for Medical Devices
Brian Schmaltz, ASYMTEK a Nordson Company

8:30 am –
9:00 am

Structural Design Aspects for Reliability of High-Density Chip-Scale Packages Using a Wafer-Stack Process
Piyush Savalia, Ilyas Mohammed, Laura Mirkarimi, Tessera, Inc.

MEMS Accelerometer Autoclave Failure Mechanisms and Design Improvement
David Y. Lin, Gopi Boinepally, Mukund Muralidhar, Freescale Semiconductor

Low Volume Low Pressure Dispensing Practices
Brad Rogers, EFD Inc. - A Nordson Company

9:00 am –
9:30 am

Chip Embedding Technology - New Technological Challenges for a Reliable System-in-Package Realization
Lars Boettcher, D. Manessis, S. Karaszkiewicz, A. Ostmann, H. Reichl, Fraunhofer Institute for Reliability and Microintegration (IZM)

Polymer-Based Wafer Bonding Technology for MEMS Applications
Viorel Dragoi, E. Pabo, T. Matthias, C. Brubaker, E. Capsuto, C. McEwan, EV Group

Artificial Spinal Disc Incorporates Gold-on-Gold Flip-Chip Technological Approach
Donald Styblo, Valtronic Technologies (USA), Inc.; Rick Navarro, Chris Cole, eDISC™, Theken Disc. LLC

9:30 am –
9:50 am

Break in Foyer

9:50 am –
10:20 am

Next Generation Package on Package (PoP) Platform with Through Mold Via (TMV) Interconnection Technology
Curtis Zwenger, JinSeong Kim, Lee Smith, Amkor Technology


A System for the Early Evaluation of Newly Developed MEMS Devices
Robert Dean, Seong Jin Kim, Nesha Hyatt, Mike Palmer, George Flowers, Auburn University

Packaging and Processing of Neural Electrodes with Benzocyclobutene
Bruce C. Kim, Jiping He, University of Alabama

10:20 am –
10:50 am

VIPOP - A Low Cost HVM POP Alternative
Marc Robinson, Larry Andrews, Larry Andrews

Vacuum Packaging of MEMS Devices and the Effects of Outgassing and Getter
Jay Mitchell, Warren Welch, Khalil Najafi, University of Michigan

Gas Compositions in Sealed Medical Device Enclosures
Richard Kullberg, R. K. Lowry, D. J. Rossiter, Oneida Research Services Inc.

10:50 am –
11:20 am

Applications of Silicon Interposers
Jean-Marc Yannou, NXP Semiconductors

SEM/EDS Based Trace Element Sensitivity (TSA) Analysis for Reducing Defects in MEMS and MOEMS (Micro-(Opto)-Electro-Mechanical Systems) Assembly
Lee R. Levine, Rachel Zane, Process Solutions Consulting; Samuel Lawrence, Lehigh University; Claudio Tarquinio, Evex Analytical

New Reconfigurable Biosensor Technique in a Microfluidic System
Seokheun Choi, Junseok Chae, Arizona State University

11:20 am –
11:30 am

Closing Remarks


Conference Registration

Early Rate Ends:
February 6, 2009

Register Today

Hotel Cut-off:

February 6, 2009

Radisson Fort McDowell Resort & Casino


Hotel Reservation Deadline - February 6, 2009

Housing accommodations must be made directly to:

Radisson Fort McDowell Resort & Casino
10438 North Fort McDowell Road
Scottsdale/Fountain Hills, AZ 85264

On-line Reservations - Promotional Code: IMAPS9


IMAPS preferred vendor for airport transportation:
Esquire Transportation offers competitive pricing.  Please call to make a reservation.
(602) 790-8963
(480) 922-3171


Corporate Sponsor - NEXX Systems

Student Paper Competition

Student Paper Competition Sponsor - The Microelectronics Foundation


Media Sponsor - Advanced Packaging

© Copyright 2010 IMAPS - All Rights Reserved
IMAPS-International Microelectronics And Packaging Society and The Microelectronics Foundation
611 2nd Street, N.E., Washington, D.C. 20002
Phone: 202-548-4001

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