KESTER

12th International Conference and Exhibition on
Device Packaging
www.imaps.org/devicepackaging

WekoPa Resort and Casino
Fountain Hills, Arizona USA

IMAPS Device Packaging

Conference and Technical Workshops
March 15-17, 2016
Exhibition and Technology Showcase
March 15-16, 2016
Professional Development Courses
March 14, 2016
GBC Plenary Session
March 16, 2016

 

Device Packaging (Amkor Image)
Courtesy of Amkor Technology
Device Packaging (RDEDCOM image)
Courtesy of US Army RDEDCOM AMRDEC

General Chair:
Rozalia Beica
Yole Developpement

General Chair-elect:
Peter Ramm
Fraunhofer EMFT Munich
Past General Chair:
Ron Huemoeller
Amkor Technology

Interposers, 3D IC & Packaging
Flip Chip, Wafer Level Packaging & FAN-OUT
SiP & Engineered Micro Systems/Devices
(including MEMS & Sensors)
Technical Co-Chair:
Jeff Calvert
Dow Electronic Materials
jcalvert@dow.com
Technical Co-Chair:
Jon Aday
Qualcomm
jaday@qti.qualcomm.com
Technical Co-Chair (Engr. Micro Sys.):
Robert Dean
Auburn University
deanron@auburn.edu
Technical Co-Chair:
Kathy Cook
Ziptronix
k.cook@ziptronix.com
Technical Co-Chair:
John Hunt
ASE US
John.Hunt@aseus.com
Technical Co-Chair (Engr. Micro Sys.):
Russell Shumway
Amkor Technology
russell.shumway@amkor.com
Technical Co-Chair:
Rahul Agarwal
GlobalFoundries
rahul.agarwal@globalfoundries.com
Technical Co-Chair:
Eric Huenger
Dow Advanced Packaging Materials
EHuenger@dow.com
Technical Co-Chair (SiP):
Nozad Karim
Amkor Technology
nozad.karim@amkor.com



Device Packaging 2016 Technical Program

TECHNICAL PROGRAM | SHORT COURSES (PDCs) | SPEAKERS | SiP PANEL | POSTERS | GBC PLENARY/KEYNOTE
EXHIBITION | 2016 EXHIBITORS


MONDAY, MARCH 14

7:00 am -
7:00 pm

Registration

7:00 am -
8:00 am

Continental Breakfast

8:00 am - Noon

FULL-DAY PDC – 8:00am-5:00pm

PDC1:MEMS and the Internet of Things: Principles, Applications, Power Supplies and Device Packaging (8-hour)
Course Leader: Slobodan Petrovic, Oregon Institute of Technology

Morning Professional Development Courses (PDCs)
* Click on PDC title to see full description *

PDC2:Introduction to Microelectronics Packaging (Part 1)
Course Leader: Tom Green, TJ Green & Associates
PDC3: Introduction to Fan-Out Wafer Level Packaging (FO-WLP)
Course Leader: Beth Keser, Qualcomm Technologies, Inc.
PDC4: Electrical Modeling and Test Strategies for 3D Packages
Course Leader: Bruce Kim, City University of New York
PDC5: Performance based Roadmaps for Advanced Packaging
Course Leader: Dev Gupta, APSTL

10:00 am - 10:20 am

Break

12:00 pm - 1:00 pm

Lunch
Only provided for those attendees registered for both Morning AND Afternoon PDCs or Full-day Courses

1:00 pm - 5:00 pm

Afternoon Professional Development Courses (PDCs)
* Click on PDC title to see full description *

PDC6: Introduction to Microelectronics Packaging (Part 2)
Course Leader: Tom Green, TJ Green & Associates
PDC7: Emerging Challenges in Packaging
Course Leader: Raja Swaminathan, Intel Corporation
PDC8: Polymers for Electronic Packaging
Course Leaders: Jeffrey Gotro, InnoCentrix, LLC
 

3:00 pm - 3 20 pm

Break

5:00 pm - 7:00 pm

Welcome Reception (All Attendees Are Invited To Attend)

Thank You to the DPC/GBC Premier Sponsors:
DPC/GBC Premier Sponsor: ASE US, Inc.
DPC/GBC Premier Sponsor: Amkor Technology
DPC/GBC Premier Sponsor: NAMICS

7:00 pm - 10:00 pm

Microelectronics Foundation Texas Hold'Em Tournament
NO EXPERIENCE NECESSARY - Beginners Luck Actually Helps!!
(Separate Registration - Limited Seating)
To Benefit the IMAPS Microelectronics Foundation


Welcome Reception
All Attendees are Invited!

Monday, March 14th | 5:00 pm – 7:00 pm


Microelectronics Foundation Charity Texas Hold'Em Tournament

$50 Ticket for Charity | Lessons During Reception

Monday, March 14th | 7:00 pm – 10:00 pm


 

TUESDAY, MARCH 15   
Morning Technical Sessions

7:00 am -
7:00 pm

Registration

7:00 am -
8:00 am

Continental Breakfast

Sponsored by:
DPC/GBC Premier Sponsor: NAMICS

8:00 am -
8:20 am

OPENING COMMENTS
General Chair:
Rozalia Beica, Yole Developpement

Keynote Sessions Sponsored by:

SPTS - Corporate Sponsor

8:20 am -
9:05 am

KEYNOTE – FAN-OUT:
Localized High Density Interconnects with Intel’s EMIB

Abstract: In recent years there has considerable interest in packages that enable high wiring density between die. This interest is motivated by the need for high inter-die bandwidth using wide and slow data busses as a means of achieving low power (i.e. low pJ/bit) interconnects. This talk provides an introduction to Intel’s high wiring density packaging technology i.e. EMIB (Embedded Multi-Die Interconnect Bridge) and compares it with other alternative technologies.

Ravi Mahajan, Senior Principal Engineer, Intel Corporation
Bio: Ravi Mahajan is a Senior Principal Engineer in the Path finding Group, part of Intel Corporation’s Assembly & Test Technology Development (ATTD) in Chandler, Arizona. He is responsible for setting technology directions for Packaging and Assembly processes for silicon at future nodes. He currently leads the Pathfinding effort for packaging @ the 7nm node. Ravi is also responsible for setting technical direction for Intel and consortia funded research in Assembly and Packaging. In this capacity he represents Intel in the Advisory Board of the Packaging Thrust in the Semiconductor Research Corporation. Ravi received a BS degree (University of Bombay, 1985), a MS degree (University of Houston, 1987) and a PhD degree (Lehigh University, 1992) in Mechanical Engineering. He specialized in Fracture Mechanics during his work towards his MS and PhD degrees. He has authored several technical papers in the areas of experimental and analytical stress analysis and thermal management. He holds several patents in the area of microelectronic packaging, most notably for the original concept of the Silicon bridge and for some of the very early cooling solutions for high power and high power density micro-electronics components. He has been Editor and one of the founding members for the Section on Micro-Electronics for the Society of Experimental Mechanics. He is also one of the founding editors for the Intel Assembly and Test Technology Journal (IATTJ) an Intel internal journal that documents challenges and current progress in the area of Assembly & Packaging. Ravi is the Co-Editor for the Special Topics Section of IEEE T-CPMT journal. Ravi is a Fellow of two leading societies i.e. The American Society of Mechanical Engineers and IEEE.

 

9:10 am -
9:55 am

KEYNOTE –3D:
The 3D Interconnect Landscape

Abstract: 3D technologies enable chip-to-chip connections with high density. With a number of key technologies, TSV, microbumps, die stacking and wafer-to-wafer bonding, it is possible to address the interconnections at the chip I/O level, the global, intermediate and the local wiring level. The presentation discusses the integration and the scaling aspects of these key technologies.

Keynote - Beyer Gerald Beyer, Program Manager 3D Integration, IMEC
Bio: Gerald Beyer is the manager of the 3D system integration program at IMEC. In this position, he is responsible for the integration activities of the program. Gerald Beyer studied chemistry and materials science obtaining a PhD on SIMS analysis of semiconductors from Imperial College, London in 1994. He then joined IMEC’s Back-End-Of-Line activities working as a process engineer for PVD, account manager and program manager of the Cu/low-k program. In 2012 he took his current position of program manager of the 3D program. Gerald Beyer is author or coauthor of about 300 publications and participated in the technical subcommittees of IEDM and SSDM.

 

10:00 am -
6:30 pm

Exhibition and Technology Showcase

10:00 am -
10:30 am

Break in Exhibit Hall

Sponsored by:

Golf Hole Sponsor: Amkor Technology

 

Interposers, 3D IC & Packaging
Fan-Out, Wafer Level Packaging & Flip Chip
Engineered Micro Systems/Devices
(including MEMS & Sensors)

TA1
3D Devices and Architectures (incl. non-TSV alternatives to 3D, Design…)

Chairs: Rahul Agarwal, GlobalFoundries; Lars Boettcher, Fraunhofer Institute IZM

TA2
Wafer Level Packaging Technology

Chairs: Eric Huenger, Dow Advanced Packaging Materials; Paul Mescher, Microsoft

TA3
Fabrication and Packaging Technologies

Chairs: Russell Shumway, Amkor Technology; Li-Anne Liew, NIST Boulder

10:30 am – 11:00 am

2.5D / 3D IC Landscape: Market and Technology Trends
Andrej Ivankovic, Yole Developpement (Thibault Buisson, Amandine Pizzagalli, Dave Towne, Rozalia Beica)

Embedded RDL Enabled by Excimer Laser Ablation
Habib Hichri, SUSS MicroTec

Novel Subsea Systems Enabled by Tension Electronic Packaging
David Fries, Institute for Human Machine Cognition (Geran Barton)
**PRESENTED BY ROBERT DEAN

11:00 am – 11:30 am

Testing in-package DRAMs and DFX features in 3D High-bandwidth Memory
Chris Nelson, Intel Corporation

Enabling Next Generation M-WLCSP through Laser Dicing
Jeroen van Borkulo, ASM Pacific Technology (Eric Tan, Eric Kuah)
**WITHDRAWN BY AUTHOR

Comparison of Hermetic Sealing Using SAC and SnPb Solder for a MEMS Pressure Sensor
Maaike Visser Taklo, SINTEF (Branson Belle, Joachim Seland Graff, Astrid-Sofie Vardoy, SINTEF; Elisabeth Ramsdal, GE Presens)

11:30 am – 12:00 pm

Cost Breakdown of 2.5D and 3D Packaging
Chet Palesko, SavanSys Solutions LLC (Amy Palesko)

Extending WLCSP Packaging Technology Capabilities to Enable Miniaturized Sensor and MEMS Packaging Applications
Ted Tessier, Huatian Technology - Flip Chip International

Advances in Aligned Wafer Bonding Enable by High Vacuum Processing
Eric Pabo, EV Group NA (Christoph Floetgen, Bernhard Rebhan, Razek Nasser)

12:00 pm– 12:30 pm

Impact of Electrical and Thermal Stresses on TSV Radiofrequency Performance
Anh Phuong Nguyen, IPDIA (Ulrike Lüders, CRISMAT; Frederic Voiron, IPDIA)

Characterization of Clean after Photoresist Removal from Wafers with Copper Pillars with Lead-Free Solder Caps
Kimberly Pollard, Dynaloy, a subsidiary of Eastman Chemical Company (Richie Peters, Michael Phenis, Don Pfettscher)

3D Printing of High Voltage Printed Wiring Boards
Eric MacDonald, University of Texas at El Paso (Ryan Wicker, David Espalin, Andy Kwas, Peter Ruby, Craig Kief

12:30 pm –
2:00 pm

Lunch In The Exhibit Hall
(Food served from 12:30 pm - 1:30 pm)

Sponsored by:

DPC/GBC Premier Sponsor: ASE US, Inc.

TUESDAY, MARCH 15   
Afternoon Technical Sessions
 
Interposers, 3D IC & Packaging
Fan-Out, Wafer Level Packaging & Flip Chip
Engineered Micro Systems/Devices
(including MEMS & Sensors)

TP1
3D Device Fabrication Processes, Materials and Yield (1)

Chairs: Jeff Calvert, Dow Electronic Materials; Diane Scheele, Dynaloy-Eastman

TP2
Fan-Out Wafer Level Packaging

Chairs: John Hunt, ASE US; Chris Scanlan, Deca Technologies

TP3
MEMS Devices and Sensors

Chairs: Keaton Rhea, Auburn University; Eric MacDonald, University of Texas El Paso

2:00 pm –
2:30 pm

System level IC packaging - Integration of Key Technologies: TSVs, Interposers, and Advanced IC Packaging
Mike Kelly, Amkor Technology (Dave Hiner, Marnie Mattei, Rick Reed, Paul Silvestri, Ron Huemoeller)

Current Status and Future Prospects of Panel Level Packaging
Santosh Kumar, Yole Developpement (Amandine Pizzagalli, Dave Towne, Thibault Buisson, Andrej Ivankovic, Rozalia Beica)

Surface Micromachined Polyimide-based Valveless Micropump
Li-Anne Liew, University of Colorado at Boulder (Ching-Yi Lin, Collin Coolidge, Y.C. Lee)

2:30 pm –
3:00 pm

Impact of Top Die Thickness on Cu Pillar Fatigue in Exposed Die 3D Packages
Rahul Agarwal, Globalfoundries (Sukesh Kannan, Shan Gao, Rick Reed, Yong Song, JS Paek)

M-Series with Adaptive Patterning for High-Yield Fan-Out SiP
Craig Bishop, Deca Technologies (Suresh Jayaraman, Boyd Rogers, Chris Scanlan, Tim Olson)

A Heat-switch-based Electrocaloric Heat Pump
Yunda Wang, PARC, a Xerox Company (D.E. Schwartz)

3:00 pm –
3:30 pm

High Speed Electroplating of 200um High Cu Bumps for Die Stacking Architectures
Richard Hollman, TEL NEXX, Inc.

Thin WLFO and based WLSiP Enabling WL3D, Realized Using Temporary Reconstituted Panel Bonding Technology
Steffen Kroehnert, NANIUM S.A. (Jose Campos, Andre Cardoso, Mariana Pires, Eoin O’Toole, Raquel Pinto, NANIUM S.A.; Emilie Jolivet, Thomas Uhrmann, Elizabeth Brandl, Juergen Burggraf, Harald Wiesbauer, Julian Bravin, Markus Wimplinger, Paul Lindner, EV Group)

A MEMS PPA Based Active Vibration Isolator
Chong Li, Auburn University (C. Lavinia Elana, Robert Dean, George Flowers)

3:30 pm –
4:00 pm

Break in Exhibit Hall

Sponsored by:

Golf Hole Sponsor: Amkor Technology

4:00 pm –
4:30 pm

Evaluation of High-Speed Copper Plating Products for RDL, Micropillar, and Fan-Out Applications
Matthew Thorseth, Dow Chemical (Mark Scalisi, Inho Lee, Sang-Min Park, Yil-Hak Lee, Jonathan Prange, Masaaki Imanari, Mark Lefebvre, Jeff Calvert)

Ultra Fine Pitch RDL Development in Multi-layer eWLB (embedded Wafer Level BGA) Packages
Bernard Adams STATS ChipPAC Inc. (Won Kyung Choi, Duk Ju Na, Andy Yong, Seung Wook Yoon, STATS ChipPAC Ltd.; Jaesik Lee, Urmi Ray, Riko Radojcic, QualcommTechnologies)

Enhancements of an In Situ Atmospheric System for Real Time Weather Monitoring
Mark Adams, Auburn University (Audrey Rose Shapland, Matthew Gutierrez, Haley Harrell, Jessica Blume, Craig Prather)

4:30 pm –
5:00 pm

First Integration Steps of Cu-based DNA Nanowires for Interconnections
Christophe Brun, CEA/LETI (Corentin Carmignani, Cheikh Tidiane-Diagne, Simona Torrengo, Pierre-Henri Elchinger, Patrick Reynaud, Aurélie Thuaire, Severine Cheramy, Didier Gasparutto, Raluca Tiron, Arianna Filoramo, Xavier Baillin)

A Study on Warpage Behavior of EMC in Post-mold Cure Stage using Moldex3D
Srikar Vallury, CoreTech System (Moldex3D) Co., Ltd. (Hsu Chih-Chung, Kai Lin, Anthony Yang, Yang-Kai Lin, CoreTech; Chao-Tsai Huang, Tamkang University)

A Non-contact Testbed for On-wafer Characterization of Terahertz Devices and ICs
Georgios Trichopoulos, Arizona State University (Cosan Caglayan, Kubilay Sertel)

5:00 pm –
5:30 pm

High-Yield Via-Last TSV Process by Notchless Silicon Etching and Wet Cleaning of the First Metal Layer
Naoya Watanabe, National Institute of Advanced Industrial Science and Technology (Hidekazu Kikuchi, Azusa Yanagisawa, Haruo Shimamoto, Katsuya Kikuchi, Masahiro Aoyagi, Akio Nakamura)

Reliability of Copper Pillar Devices Assembled using One Step Chip Attach Materials and (OSCA-R) Conventional Mass Reflow Processing
Daniel Duffy, Kester Inc. (Hemal Bhavsar, Lin Xin, Jean Liu, Bruno Tolla)
**WITHDRAWN BY AUTHOR

Terahertz Diode Arrays and Differential Probes based on Heterogeneous Integration and Silicon Micromachining
Robert Weikle, University of Virginia (C. Zhang, S. Hawasli, S. Nadri, L. Xie, N. Scott Barker, A.W. Lichtenberger)

5:00 pm –
6:30 pm

Exhibit Hall Reception

Sponsored by:

Mentor Graphics - Corporate Sponsor
EMD Performance Materials - Corporate Sponsor


6:30 pm –
8:00 pm

EVENING PANEL DISCUSSION ON:
SiP: New Drivers and the Supply Chain

System-in-Package (SiP) is a subsystem functional block integrating multiple ICs and often passives in a single package. SiPs are increasingly being adopted in a variety of applications ranging from wearables and mobile devices to high performance computing and automotive electronics. This panel explores the drivers for SiP with perspectives from representatives actively involved in the industry infrastructure. This panel brings together a panel representing the foundry, OSAT, EMS, foundry, and customer in the SiP supply chain. Challenges in the expansion of SiP will be discussed.

Session & Refreshments Sponsored by:

Applied Materials - Event Sponsor

 

Moderator:
E. Jan Vardaman, President, TechSearch International

Panelists:
Tom DeBonis, Technology Integration Manager, Assembly/Test Technology Development, Intel Corporation
Dr. Venkat Iyer, Packaging Manager, Flextronics
Robert Lanzone, Sr. VP/AWL&PD, Amkor Technology (OSAT)
Rich Rice, Sr. VP of Sales/Engr North America, Business Development, ASE
Lee Smith, Vice President Marketing & Product Line, UTAC

 

GBC Speaker Dinner | 8:00 pm
(By Invitation Only)

Thank you to the GBC Speaker Dinner Sponsors:

DPC/GBC Premier Sponsor: ASE US, Inc.
DPC/GBC Premier Sponsor: Amkor Technology
DPC/GBC Premier Sponsor: NAMICS

 

 


Early Conference Registration

Early Registration Rate Ends:
February 19, 2016

All registration fees increase after the deadline



 

WEDNESDAY, MARCH 16   
GBC Plenary Session on System Integration and Package Assembly Supply Chain Implications
7:00 am -
6:00 pm
Registration
7:00 am -
8:00 am

Continental Breakfast

Sponsored by:
DPC/GBC Premier Sponsor: NAMICS

8:00 am -
8:15 am

GBC
GBC Keynote & Plenary Session on
System Integration and Package Assembly
Supply Chain Implications

OPENING COMMENTS: Lee Smith, (UTAC) United Test & Assembly Center; Rich Rich, ASE Group

8:15 am -
9:00 am

Keynote - Bill McCLean

Keynotes Sponsored by:

SPTS - Corporate Sponsor

GBC KEYNOTE –
Are IC Industry Cycles Dead or Just Sleeping?

Bill McClean, President
IC INSIGHTS, INC.

Abstract: Although a high level of uncertainty still looms over the global economy, sales of smartphones continue to reach new highs and the Internet of Things looms on the horizon. IC Insights will present its forecast for the IC market and unit volume shipments in the context of the IC industry cycle model. In order to make sense out of the current turmoil, a top-down analysis of the IC market will be given and include trends in worldwide GDP growth, electronic system sales, and semiconductor industry capital spending and capacity.

Mr. McClean began his market research career in the integrated circuit industry in 1980 and founded IC Insights in 1997. During his 34 years of tracking the IC industry, Mr. McClean has specialized in market and technology trend forecasting and was responsible for developing the IC industry cycle model. At IC Insights, he serves as managing editor of the company’s market research studies and reports. In addition, he instructs for IC Insights’ seminars and has been a guest speaker at many important annual conferences held worldwide (e.g., SEMI’s ISS and Electronic Materials Conferences, The China Electronics Conference, and The European Microelectronics Summit). Mr. McClean received his Bachelor of Science degree in Marketing and an Associate degree in Aviation from the University of Illinois.

9:00 am -
9:30 am

Hardware Opportunities for a Connected World
E. Jan Vardaman, President
TECHSEARCH INTERNATIONAL

9:30 am -
10:00 am

SiP Trends in Handsets and Wireless Apps
Rozalia Beica, Chief Technology Officer
YOLE DEVELOPPEMENT

10:00 am -
4:00 pm

Exhibition and Technology Showcase

10:00 am – 10:45 am

Break in Exhibit Hall

Sponsored by:

Break Sponsor: Amkor Technology

Shenmao - Event Sponsor
10:45 am -
11:15 am

IC Industry Consolidation and Outlook with China Targeting $$ to Attain a Significant Share of IC Manufacturing
Jim Walker, Research VP Semiconductor Manufacturing
GARTNER TECHNOLOGY AND SERVICE PROVIDER RESEARCH

11:15 am -
11:45 am

System Scaling for New Era of Automotive Electronics -
An Ultimate System Integration Opportunity for Supply-Chain Mfg Consortium

Rao Tummala, Director, 3D Microsystems Packaging Research Center
GEORGIA INSTITUTE OF TECHNOLOGY

11:45 am - 12:00 pm

GBC CLOSING REMARKS

12:00 pm –
1:30 pm

Lunch In The Exhibit Hall
(Food served from 12:00 pm - 1:00 pm)

Sponsored by:

DPC/GBC Premier Sponsor: ASE US, Inc.

 

WEDNESDAY, MARCH 16   
Afternoon Technical Sessions
 
Interposers, 3D IC & Packaging
Fan-Out, Wafer Level Packaging & Flip Chip
Engineered Micro Systems/Devices
(including MEMS & Sensors)
SiP
New Sessions for 2016!

WP1
3D Device Fabrication Processes, Materials and Yield (2)

Chairs: Kathy Cook, Ziptronix; Thomas Uhrmann, EV Group

WP2
Flip Chip Assembly Process Equipment / Materials

Chairs: Kevin Martin, Atotech USA; Linda Bal, TechSearch International

WP3
Nonlinear Systems and Chaos

Chairs: Robert Dean, Auburn University; Aubrey Beal, U.S. Army AMRDEC

WP4
System-in-Package Part 1

Chair: Nozad Karim, Amkor Technology

1:30 pm –
2:00 pm

Packaging and Assembly Challenges for 2.5D/3D Devices
Gerald Beyer, IMEC (Kenneth Rebibis, Arnita Podpod, Francisco Cadacio, Teng Wang, Andy Miller, Eric Beyne)

Advancements in Flip Chip Assembly Equipment and Processes
Bob Chylak, Kulicke and Soffa (Horst Clauberg, Daniel Buergi)

A Survey of Nonlinear Phenomena and Chaos in Microsystems and Packaging
Aubrey Beal, Charles M. Bowden Laboratory, U.S. Army AMRDEC (Robert Dean)

Si Photonics Deployment Using Cu Pillar Interconnect and Chip On Wafer Platform
Miguel Jimarez, Amkor Technology Inc. (DongHee Kang, SangYun Ma, Amkor Technology; Rocky Leblanc, Michael Mack, Chang Sohn, Gianlorenzo Masini, Luxtera)

2:00 pm –
2:30 pm

Non-Conductive Film (NCF) Underfill: Materials, Performance, and Evolution to Next Generation Devices
Paul Morganelli, Dow Electronic Materials (, Robert Barr, Jeffrey Calvert, Avin Dhoble, David Fleming, Jong-Uk Kim, Herong Lei, Dow Electronic Materials; Juergen Grafe, Julian Haberland, Fraunhofer IZM)

V-DOE Full Cut Dicing of Thin Si IC Wafers
Jeroen van Borkulo, ASM Pacific Technology (Paul Verburg, Eric Tan)

Nonlinear Dynamics Induced Anomalous Hall Effect in Topological Insulators
Guanglei Wang, Arizona State University (Hongya Xu, Ying-Cheng Lai)

Innovated L/S less than 2/2um Line Embedded 2.1D Organic Substrate Technology
Yu-Hua Chen, Unimicron Technology Corp.

2:30 pm –
3:00 pm

Laser Direct Patterning of Dry Etch BCB Adhesive Layers for Low Temperature Permanent Wafer-to-Wafer Bonding
Kai Zoschke, Fraunhofer IZM (J.-U. Kim, M. Wegner, M. Gallagher, R. Barr, J. Calvert, Dow Electronic Materials; M. Toepper, K.-D. Lang, Fraunhofer IZM)

Emerging Flux Challenges for BGA Packages
Andy Mackie, Indium Corporation (Maria Durham, Jason Chou-Area)

A Novel Third Order Analog Chaotic Oscillator
Benjamin Rhea, Auburn University (Frank Werner, Remington Harrison, Robert Dean)

Why Mold When You Can NanoTech?
Simon McElrea, Semblant Inc.

3:00 pm –
4:00 pm

Break in Exhibit Hall

Sponsored by:

Break Sponsor: Amkor Technology

Shenmao - Event Sponsor
4:00 pm –
4:30 pm

Critical Process Parameters And Failure Analysis For Temporary Bonded Wafer Stacks
Thomas Uhrmann, EV Group (Elisabeth Brandl, Karine Abadie, Markus Wimplinger, Juergen Burggraf, Julian Bravin, EV Group; Frank Fournel, Pierre Montmeat, Univ. Grenoble/CEA)

Precise, High Throughput Dispensing of Thermal Interface Material in BGA Packaging Applications
Hanzhuang Liang, Nordson Asymtek (Linh Rolland)

2016dpc072 - Nonlinear Dynamics and Chaos in Micro/Nano-Scale Systems and Applications
Ying-Cheng Lai, Arizona State University

SiP Technology Trends
Hamid Eslampour, STATS ChipPAC

4:30 pm –
5:00 pm

TCB Process Options to Achieve the Lowest Cost
Tom Strothmann, Kulicke & Soffa Industries, Inc.

Washable Coatings for Packaging Practices
John Moore, Daetec LLC (Alex Brewer)

A Matched Filter Developed for Chaotic Waveforms
Frank Werner, Auburn University (Benjamin Rhea, Aubrey Beal, William Abell, John Bailey, Remington Harrison, Robert Dean, Michael Hamilton)

Investigation of Warpage Behavior of Silicon Semiconductor on a Silicon - Adhesive - Ceramic Integrated Structure at Cryogenic Temperatures
Eyup Can Baloglu, Middle East Technical University (Tuba Okutucu Ozyurt, Zafer Dursunkaya)

5:00 pm –
5:30 pm

Photolithography Alignment Mark Transfer System for Low Cost, Advanced Packaging and Bonded Wafer Applications
Tom Swarbrick, Rudolph Technologies (Keith Best, Steve Gardner, Casey Donaher)

Improvements in Decision Making Criteria for Thermal Warpage
Neil Hubble, Akrometrix

Nonlinear Observability Analysis of Micro-machined Electrostatic Actuators Using Self-Sensing
Chong Li, Auburn University (Robert Dean, George Flowers

The Direct Plating Copper (DPC) Ceramic Material on Al2O3/AlN or LTCC (Low-Temperature Co-fired Ceramic) Substrates
Ho-Chieh (Jay) Yu, ICP Technology (Jason Huang)

5:30 pm –
6:30 pm

Interactive Poster Session & "Happy Hour"
Outside On Patio Overlooking Desert: 5:30 pm - 6:30 pm
(Poster Presenter Setup - 4:00 pm - 5:00 pm)

Poster Session & Happy Hour Sponsored by:

Poster Session / Happy Hour Sponsor: XIA

 

Improvements in Decision Making Criteria for Thermal Warpage
Neil Hubble, Akrometrix

Application of Mathematical Modeling to Thermo - Compression Flip Chip Bonding of Copper Micro Pillar Bumps for 3D Die Stacking
Dev Gupta, APSTL, LLC

Cost Analysis of a Wet Etch TSV Reveal Process
Amy Palesko Lujan, SavanSys Solutions LLC (Laura Mauer, John Taddei, Veeco Precision Surface Processing)

Portable System Design for Post-tensioned Prestressed Ducts Based on Coplanar Capacitive Sensor
Nan Li, Beijing University of Technology (Mingchen Cao, Kui Liu)

The Effects of Surface Finish on the Microstructure of Sintered Paste Joints
Catherine Shearer, Ormet Circuits, Inc.

Cost Breakdown of 2.5D and 3D Packaging
Chet Palesko, SavanSys Solutions LLC (Amy Palesko)

Numerical Simulation of Copper Migration in Single Crystal CdTe
Da Guo, Arizona State University (Dragica Vasileska)

Formable Electronics for Embedded Randomly Shaped Circuits
Lars Boettcher, Fraunhofer IZM

TCAD Modeling of InGaN-Based High Temperature Photovoltaic Solar Cell
Yi Fang, Arizona State University (Dragica Vasileska, Stephen Goodnick)

Next Level of Enhanced Isotropic Etchants
Kevin Martin, Atotech Deutschland GmbH (R. Haidar, P. Brooks, F. Michalik, N. Luetzow, G. Schmidt, T. Huelsmann, M. Kloppisch)

New Uses of Excimer Laser Technology in the Packaging Industry
Dirk Mueller, Coherent Inc. (Rainer Pätzel)

Carbon-monoxide Lasers Disrupt Current Micro-via Drilling Technology
Dirk Mueller, Coherent Inc. (Andrew Held, John Kennedy, Stephen Lee, John Washko)

Wafer-Level Packaging For Ultra-Thin Glasses Using Hermetic Room Temperature Welding Technology
Antti Määttänen, Primoceler Oy (Heidi Lundén)

Design of TSV-based Inductors for Internet of Things
Bruce Kim, City University of New York (Saikat Mondal)

Assessing the Reliability of Low Alpha Measurements of Packaging Materials
Brendan McNally, XIA LLC

Washable Coatings for Packaging Practices
John Moore, Daetec LLC (Alex Brewer)

In event of inclement weather, the poster session will be held in the foyer of the conference center

 

 

THURSDAY, MARCH 17   
Technical Sessions

7:00 am –
11:30 am

Registration

7:00 am –
8:00 am

Continental Breakfast

Sponsored by:
DPC/GBC Premier Sponsor: NAMICS

8:00 am -
8:45 am

Keynote Sessions Sponsored by:

SPTS - Corporate Sponsor

KEYNOTE – 3D:
Packaging & IOT Security

Abstract: From its simplest form to its most complex 2.5D/3D form, packaging technologies have influenced the way we live. A connected world is faced with threats of security breaches, either cyber or physical attack. As chips and packages are becoming increasingly susceptible to malicious alteration due to globalization of chip design and manufacturing processes, IOT and 2.5D/3D integration is emerging as a potential catalyst platform for intruders. Numerous security measures are underway to enable a secure connected world. The new challenge confronting the packaging industry is managing costs while addressing the threat of security breaches that could compromise data confidentiality and integrity.

Farhang Yazdani Farhang Yazdani, President & CEO, BroadPak Corporation
Bio: Farhang Yazdani is the President and CEO of BroadPak Corporation, providing total solution and technologies to develop and launch secured 2.5D/3D products. Through his 17 years with the industry, he has served in various technical, management, and advisory positions with leading semiconductor companies worldwide. He has numerous publications and IPs in the area of 2.5D/3D Packaging and Assembly, serves on various technical committees and is a frequent reviewer for IEEE Journal of Advanced Packaging. He received his undergraduate and graduate degrees in Chemical Engineering and Mechanical Engineering from the University of Washington, Seattle.
8:45 am -
9:30 am

KEYNOTE – FAN-OUT:
Hetereogenous Integration through Fan Out SiP

Abstract: The vision for electronics serving society has crystalized into a grand vision of smart everything, cloud everywhere, and smart devices for everyone. The sophistication of this emerging electronics market is fueling relentless innovation across technology and ecosystem to facilitate the timely manufacture of highly integrated devices achieving higher performance, lower power, and smaller footprint. With heterogeneous Integration through System-in-Package increasingly being defined as the way ahead, consideration must be given to the packaging technologies being developed to achieve this vision.

Bill Chen will discuss the importance of heterogenous integration and SiP , and will go on to explore Fan Out SiP as a highly viable core technology poised to meet complex requirements demanded by miniaturized components being packaged together with the promise of enhanced overall functionality and improved operating characteristics.

Keynote - Chen William T. Chen (Bill), ASE Fellow and Senior Technical Advisor, ASE Group
Bio: William Chen (Bill) holds the position of ASE Fellow and Senior Technical Advisor at ASE Group. Prior to joining ASE, he was the Director at the Institute of Materials Research & Engineering in Singapore. Bill retired from IBM Corporation after a career spanning over thirty years in various R&D positions. He has held adjunct and visiting faculty positions at Cornell University, Hong Kong University of Science and Technology, and Binghamton University. Currently, he is the co-chair of the ITRS Assembly Packaging Technical Working Group. He was a past President of the IEEE CPMT Society, and has been elected a Fellow of IEEE and a Fellow of ASME. Bill received B. Sc. from London University, M.Sc. from Brown University and Ph.D. from Cornell University.


9:30 am –
9:45 am

Break in Foyer

Sponsored by:

Break Sponsor: Amkor Technology

Shenmao - Event Sponsor
 
Interposers, 3D IC & Packaging
Fan-Out, Wafer Level Packaging & Flip Chip
SiP & Engineered Micro Systems/Devices
(including MEMS & Sensors)
SiP
New Sessions for 2016!

 

THA1
2.5D/Advanced Packaging (Others: RF, Integrated Passives, Medical…)

Chairs: Franck Murray, IPDiA; Eric Pabo, EV Group

THA2
Components and BGA Package Reliability

Chairs: Curtis Zwenger, Amkor Technology; Eric Huenger Dow Advanced Packaging Materials

THA3
Nanotechnology and Photonics

Chairs: Bobby Weikle, University of Virginia; Mark Adams, Auburn University

THA4
System-in-Package Part 2

Chair: Simon McElrea, Semblant Inc

9:45 am –
10:15 am

Glass Fan-out Packaging for Next Generation Electronics
Venky Sundaram, Georgia Tech 3DPRC

Stacking of 3D Capacitor Chips in a Package for a Compact and Reliable Component Working at High Temperature
Stephan Borel, CEA-LETI (P. Descours, B. Goubault, P. Nicolas, R. Franiatte, G. Parat, M. Pommier, S. Yon, G. Simon, C. Bunel)

Numerical Simulation of Copper Migration in Single Crystal CdTe
Da Guo, Arizona State University (Dragica Vasileska)

Design of High Density SiP for Complex Computing System in Micro SD Format
Chris Baratt, Insight SiP

10:15 am –
10:45 am

Advancements in Glass for Packaging Applications
Aric Shorey, Corning Inc. (Rachel Lu, Gene Smith)

Low profile Flip-Type or Embedded Silicon Capacitors for Decoupling
Catherine Bunel, IPDiA (Franck Murray)

Preserving Nb Superconducvity in Thin Film Flexible Structures
Vaibhav Gupta, Auburn University (John Sellers, Charles Ellis, Simin Zou, George Hernandez, Rujun Bai, Yang Cao, David Tuckerman, Michael Hamilton)

An Innovative Package EMC Solution Using a Highly Cost-Effective Sputtered Conformal Shield
Nozad Karim, Amkor Technology (Rong Zhou, Amkor Technology; Jun Fan, Missouri University of Science and Technology)

10:45 am –
11:15 am

Innovated Process Integration for Panel Size Glass Substrate Manufacturing for SiP Application
Yu-Hua Chen, Unimicron Technology Corp. (Yu-Chung Hsieh, Wei-Di Lin, Chun-Hsien Chien, Dyi-Chung Hu)

How Mitigation Techniques Affect Reliability Results for BGAs
Greg Caswell, DfR Solutions (Melissa Keener)

A Multiscale Modeling Approach to Study Transport in Silicon Heterojunction Solar Cells
Pradyumna Muralidharan, Arizona State University (Stuart Bowden, Stephen Goodnick, Dragica Vasileska)

Laser-based Package Singulation and Trenching for SiP
Dirk Mueller, Coherent Inc. ( David Clark, Joris VanNunen, Ed Rea, Hatim Haloui)

11:15 am –
11:45 am

Embedded Die Packages and Modules for Power Electronics Applications
Lars Boettcher, Fraunhofer IZM (S. Karaszkiewicz , D. Manessis , A. Ostmann)

Process and Evaluation of High Reliability Reworkable Edge Bond Adhesives for Large Area BGA Applications
Swapan Bhattacharya, Engent Inc. (Fei Xie, Daniel Baldwin, Han Wu, Kelley Hodge, Qing Ji)

Design of TSV-based Inductors for Internet of Things
Bruce Kim, City University of New York (Saikat Mondal)

Wafer-Level Packaging For Ultra-Thin Glasses Using Hermetic Room Temperature Welding Technology
Antti Määttänen, Primoceler Oy (Heidi Lundén)

11:45 am

Closing Remarks

1:00 pm Start

2016 IMAPS Microelectronics Foundation Spring Golf Outing
1:00pm Shotgun Start -- "Scramble"

SunRidge Canyon Golf Club
Fountain Hills, AZ

Golf/Foundation Sponsors

"Eagle" Sponsor (3 holes):
DPC/GBC Premier Sponsor: ASE US, Inc.

Holes: #1, #12 - Closest to Pin, #16

"Birdie" Sponsor (1 hole):
Golf Hole Sponsor: Amkor Technology

Hole #3 - Longest Drive

"Eagle" Sponsor (3 holes):DPC/GBC Premier Sponsor: NAMICS

Holes: #2, #8 - Closest to Pin, #18

EMD Performance Materials - Corporate Sponsor

Hole #14 - Closest to Pin

Golf Hole Sponsor: Infinite Graphics

Hole #6 - Closest to Pin

MRSI - Break Sponsor

Hole #10

Golf Hole Sponsor: Coining Inc/SPM

Hole #5

Technic - Sponsor - Mobile Charging Station

Hole #7

VEECO - Golf Sponsor

Holes #4 - Longest Putt, #15

ASM Pacific - Hole Sponsor

Hole #11

Golf Hole Sponsor: AGC Electronics America

Hole #13

Golf Hole Sponsor: Dixon Golf

Hole #9 - Straight Drive Competition
Hole #17 - Hole-in-One Competition




Hotel Cut-off:
February 10, 2016
Book your hotel reservation today! We have reserved a block of rooms at the host hotel to accommodate our attendees. The discounted room rates are only available until the hotel deadline listed above, or until the room block sells out (and they often sell out early - before the expire dates). Reservations received after the noted deadline or after the room block has been filled may be subject to significantly higher rates. IMAPS room blocks at most hotels historically sell out ahead of the discount deadline, so we encourage you to make your hotel reservations quickly for the best price and availability.

WeKoPa Resort & Casino | Fountain Hills, AZ 85264

 

Professional Development Courses (PDCs) | Exhibition Information

 


Housing

Hotel Reservation Deadline - February 10, 2016

Housing accommodations must be made directly to:

WeKoPa Resort & Casino
10438 North Fort McDowell Road
Scottsdale/Fountain Hills, AZ 85264

CERTAIN NIGHTS AT THE HOST HOTEL - WEKOPA RESORT - MIGHT NOW BE SOLD OUT
IMAPS is setting up additional rooms at the Comfort Inn Fountain Hills - Details Soon
You can of course search for other hotels in nearby Fountain Hills as well.

 

Book your hotel reservation today! We have reserved a block of rooms at the host hotel to accommodate our attendees. The discounted room rates are only available until the hotel deadline listed above, or until the room block sells out (and they often sell out early - before the expire dates). Reservations received after the noted deadline or after the room block has been filled may be subject to significantly higher rates. IMAPS room blocks at most hotels historically sell out ahead of the discount deadline, so we encourage you to make your hotel reservations quickly for the best price and availability.

Hotel Scams Alert!
All reservations should be made directly with the hotel and within the IMAPS room block. We are not using a housing company. If any person or firm contacts you and offers to handle your reservations, please beware. They are completely unauthorized and possibly fraudulent. The convention industry is currently plagued by such groups. If you use one of them and experience any problems, including lost deposits and no reservation when you arrive, IMAPS may not be able to assist you. Please be aware in particular of one of these unauthorized firms – Exhibition Housing Services – whose salespeople have falsely claimed to be calling from IMAPS.

The only way to book a room in the official IMAPS Housing Block using the reservations information above.

 



Speaker Dates/Information:

  • Abstracts Deadline Extended to: December 15, 2015
  • Speaker Notification Emails: January 14, 2016
  • Extended Abstract Materials due: February 19, 2016
  • Hotel Reservation Deadline: February 10, 2016
  • Early Registration Deadline: February 19, 2016
  • Speaker Bios Due: March 1, 2016
  • Powerpoint/Presentation file for DOWNLOAD due not later than: March 17, 2016 (Last day of Conference)
  • Powerpoint/Presentation file used during session: Speaker's responsibility to bring to session on USB (recommended to have back-up on personal laptop or email to bschieman@imaps.org prior to event)
  • Technical Presentation Time: 30 minutes (25 to present; 5 for Q&A) - Keynotes: 45 minutes (40 to present; 5 for Q&A)

Presentation Format/Template:
IMAPS does not require you to use a conference powerpoint template.
You are able to use your regular company/preferred powerpoint templates.
Please include the IMAPS show name and dates on your template and/or an IMAPS logo.

Dress Code:
There is no officially "dress code" for IMAPS Conferences. We ask you to be BUSINESS CASUAL or whatever more you prefer. Most speakers tend to be in business pants and button down/company logo shirts (Women in dresses or the same). Suits, sport coats and ties are common as well. We do not recommend casual attire.

Session rooms will be equipped with:
Screen, projector, podium, IMAPS laptop (with Microsoft Windows and recent OFFICE suite), microphone, and slide remote/laser pointer.

All session presentations are 25 minutes followed by 5 minutes for Questions
You are required to load your powerpoint/presentation onto the session laptop yourself using your USB drive.
Speak with your session chair if you need assistance.

About the Session:
Sessions begin with Session Chairs making general announcements. Session Chairs will then introduce speakers by reading BIOs. Speaker will present for 25 minutes, followed by 5 minutes for questions. Session Chairs will thank the speakers. This process is repeated for each speaker in the session. Many sessions will take refreshment breaks (see program).

Photography is not permitted in the session rooms.

Silence all mobile phones during session attendance.

 


Device Packaging/GBC Sponsorship
(Need to be ahead of your competition? Join this list today! A few spots remain)

PREMIER SPONSOR:
DPC/GBC Premier Sponsor: ASE US, Inc.

PREMIER SPONSOR:
Golf Hole Sponsor: Amkor Technology

PREMIER SPONSOR:
DPC/GBC Premier Sponsor: NAMICS

Corporate Sponsors
SPTS - Corporate Sponsor
Mentor Graphics - Corporate Sponsor
EMD Performance Materials - Corporate Sponsor
Event Sponsors

Mobile APP Sponsor: SETNA

Mobile "App" Sponsor

Applied Materials - Event Sponsor

Mobile Charging Station &
Evening Panel / Reception

VEECO - Mobile Charging Station & Golf Sponsor

Mobile Charging Station

Shenmao - Event Sponsor

Refreshment Breaks &
Attendee Bag Insert

Poster Session / Happy Hour Sponsor: XIA

Poster Session & Happy Hour Sponsor

 

 

 

Golf/Foundation Sponsors

"Eagle" Sponsor (3 holes):
DPC/GBC Premier Sponsor: ASE US, Inc.

Holes: #1, #12 - Closest to Pin, #16

"Birdie" Sponsor (1 hole):
Golf Hole Sponsor: Amkor Technology

Hole #3 - Longest Drive

"Eagle" Sponsor (3 holes):DPC/GBC Premier Sponsor: NAMICS

Holes: #2, #8 - Closest to Pin, #18

EMD Performance Materials - Corporate Sponsor

Hole #14 - Closest to Pin

Golf Hole Sponsor: Infinite Graphics

Hole #6 - Closest to Pin

MRSI - Break Sponsor

Hole #10

Golf Hole Sponsor: Coining Inc/SPM

Hole #5

Technic - Sponsor - Mobile Charging Station

Hole #7

VEECO - Golf Sponsor

Holes #4 - Longest Putt, #15

ASM Pacific - Hole Sponsor

Hole #11

Golf Hole Sponsor: AGC Electronics America

Hole #13

Golf Hole Sponsor: Dixon Golf

Hole #9 - Straight Drive Competition
Hole #17 - Hole-in-One Competition

Official Media Sponsors
Media Sponsor: MEMS Journal
Media Sponsor: Semiconductor Packaging News
Media Sponsor: Chip Scale Review
Media Sponsor: MEPTEC
Media Sponsor: Webcom - Antenna Systems & Technology
Media Sponsor: Webcom - Electronics Protection
Media Sponsor: Webcom - Thermal News
3D Incites - Media Sponsor
Solid State Technology - Media Sponsor
     


CORPORATE PREMIER MEMBERS
  • Amkor
  • ASE
  • Canon
  • GaN Systems
  • Honeywell
  • Indium
  • Isola Group
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • NEO Tech
  • NGK NTK
  • Palomar
  • Plexus
  • Qualcomm
  • Specialty Coating Systems