IMAPS Home
Members Only
Login
About IMAPS
Events Calendar
Online Store
Membership
Chapters/Committees
Global Business Council
Industry News
Publications
Careers
IMAPS Microelectronics Foundation
Contact Us

FLIP CHIP TECHNOLOGY WORKSHOP AND EXHIBITION 2002

Advance Program

JUNE 24-26, 2002
FOUR SEASONS HOTEL
98 SAN JACINTO BOULEVARD
AUSTIN, TX 78701
P: 512-478-4500; F: 512-477-0704
WWW.FOURSEASONS.COM


GENERAL CHAIR:
Peter Elenius, K&S - Flip Chip Division
pelenius@flipchip.com

GENERAL VICE-CHAIR:
Deborah Patterson, K&S - Flip Chip Division
dpatterson@flipchip.com

TECHNICAL PROGRAM CHAIRS:
Ted Tessier, Amkor Technologies
ttess@amkor.com

Larry Gilg, Die Products Consortia
gilg@dieproduct.com

IMAPS PRESIDENT:
Charles Bauer, TechLead Corporation

Chuck.Bauer@TechLeadCorp.com

V.P. OF TECHNOLOGY:
R. Wayne Johnson, Auburn University
johnson@eng.auburn.edu

TOPICAL WORKSHOP CHAIR:
Ajay Malshe, University of Arkansas
apm2@engr.uark.edu


SPONSORED BY:
INTERNATIONAL MICROELECTRONICS AND PACKAGING SOCIETY (IMAPS)

EXHIBITION SPONSORED BY:
IMAPS/SMTA - Central Texas Chapter (CTEA - Central Texas Electronic Association)


Message from the General Chair:

The International Microelectronics And Packaging Society (IMAPS), is sponsoring Flip Chip 2002, a Topical Workshop (TW) on the latest advances in Flip Chip and Wafer Scale Packaging Technologies, to be held June 24-26, 2002, at the Four Seasons Hotel, Austin, Texas. This Workshop will include topical sessions covering flip chip and WSCSP design, modeling, process, assembly and test developments, and a timely Professional Development Course.

With the rapid growth in the deployment of flip chip technologies recently, this forum provides an outstanding opportunity to be exposed to the "latest and greatest" activities in this dynamic and exciting area of advanced packaging. The attendance at this Workshop in 2001 was in excess of 400 attendees, with more than 45 informative Tabletop Exhibitors participating. This year's meeting is expected to be bigger and better than ever with strong participation from both industry and academia, and as such provides an outstanding opportunity for attendees to network with peers who are actively working in this area.

Conference and events will be held June 24-26, 2002.

Tabletop Exhibits will be on display June 24 & 25, 2002.

See you in Austin!

Peter Elenius, VP of Technology
K&S, Flip Chip Division
pelenius@flipchip.com
 



EXHIBITION HOURS
MONDAY, JUNE 24 10 AM - 7:30 PM
TUESDAY, JUNE 25* 10 AM - 4 PM
*REFRESHMENT BREAKS AND LUNCH WILL BE IN THE EXHIBITS HALL

PROFESSIONAL DEVELOPMENT COURSE - (1/2 DAY)
MONDAY, JUNE 24 1 PM - 5 PM
FLIP CHIP TECHNOLOGY: BUMPING, PWBS, ASSEMBLY AND RELIABILITY
INSTRUCTOR: R. WAYNE JOHNSON, AUBURN UNIVERSITY

WELCOME RECEPTION IN THE EXHIBIT HALL
MONDAY, JUNE 24 6 PM - 7:30 PM



MONDAY, JUNE 24

Professional Development Course
FLIP CHIP TECHNOLOGY: BUMPING, PWBS, ASSEMBLY AND RELIABILITY
(1/2 DAY)
1 pm - 5 pm

R. WAYNE JOHNSON, AUBURN UNIVERSITY

DESCRIPTION: 
This course provides insight into the design and assembly of electronics using flip chip devices. The course will cover the practical issues of implementing flip chip technology from wafer bumping to reliability characterization. Today, bumped die are generally not standard products from the semiconductor manufacturers. However, through 3rd party bumping services, electronics assemblers can obtain die bumped. This workshop will begin with an examination of bumping options and corresponding design rules. Redistribution will also be discussed. Substrate requirements for flip chip will then be presented including a discussion of high density interconnect options and substrate design. Assembly of flip chip devices adds materials and processes to the standard SMT assembly process and the integration of these into the SMT process flow is examined. Materials and processes to be discussed include fluxes, underfills (capillary flow, fluxing no-flow, and wafer applied), substrate dehydration, flux and underfill application, underfill curing, inspection, and underfill characterization techniques. The workshop will conclude with a discussion of flip chip assembly reliability testing. 

WHO SHOULD ATTEND? 
This course is intended for those individuals soon to be responsible for implementing flip chip assembly, suppliers of materials and equipment for flip chip assembly and others interested in flip chip implementation. 

INSTRUCTOR BIO: 
Dr. Wayne Johnson is an Alumni Professor of Electrical Engineering at Auburn University and Director of the Laboratory for Electronics Assembly and Packaging (LEAP). At Auburn, he has established teaching and research laboratories for advanced packaging and electronics assembly. Research efforts are focused on materials, processing, and reliability for advanced SMT, wire bond and flip chip assembly. He has published and presented numerous papers at workshops and conferences and in technical journals. He has also co-edited one IEEE book on MCM technology and written two book chapters in the areas of silicon MCM technology and MCM assembly. He received the 1997 Auburn Alumni Engineering Council Senior Faculty Research Award for his work in electronics packaging and assembly.

Dr. Johnson was the 1991 President of the International Society for Hybrid Microelectronics (ISHM). He received the 1993 John A. Wagnon, Jr. Technical Achievement Award from ISHM, was named a Fellow of the Society in 1994 and received the Daniel C. Hughes Memorial Award in 1997. He is also a member of IEEE, SMTA, and IPC.

Dr. Johnson received the B.E. and M.Sc. degrees in 1979 and 1982 from Vanderbilt University, Nashville, TN, and the Ph.D. degree in 1987 from Auburn University, Auburn, AL, all in electrical engineering. He has worked in the microelectronics industry for DuPont, Eaton, and Amperex.




TECHNICAL PROGRAM

MONDAY, JUNE 24

REGISTRATION
9 am - 8 pm

EXHIBITS OPEN
10 am - 7:30 pm

WELCOME RECEPTION IN THE EXHIBIT HALL
6 pm - 7:30 pm


SESSION 1: PLENARY SESSION
7:30 pm - 9 pm
SESSION CHAIRS: PETER ELENIUS & DEBORAH PATTERSON, K&S - FLIP CHIP DIVISION

OPPORTUNITIES IN THE GROWING FLIP CHIP MARKET
Jan Vardaman, Tech Search 


TUESDAY, JUNE 25

CONTINENTAL BREAKFAST: 7 AM - 8 AM

EXHIBITS OPEN: 10 AM - 4 PM

SESSION 2: FLIP CHIP RELATED PROCESS TECHNOLOGIES 
8 am - 11:30 am
SESSION CHAIRS: JOACHIM KLOESER, EKRA GMBH; THOMAS OPPERT, PACTECH GMBH

A FLIP CHIP PROCESS FOR KNOWN GOOD DIE UTILIZING ELECTROLESS NI/AU AND EUTECTIC PB/SN SOLDER
Robin Jokie Hershey, Rathandra Pal, University Research
Foundation 

LOW COST, WIDE TEMPERATURE RANGE ADHESIVE FLIP-CHIP TECHNOLOGY USING A COMBINATION OF ICA AND NCA
Jan Vanfleteren, Bjorn Vandecasteele, Thomas Podprocky, IMEC/Intec/TFCG 

CONTACTLESS LASER SOLDER JETTING FOR FINE PITCH FLIP CHIP BUMPS
Thomas Oppert, Lars Titerle, Ghassem Azdasht, Elke Zakel, Pac Tech - Packaging Technologies GmbH

REFRESHMENT BREAK IN THE EXHIBIT HALL: 9:30 AM - 10 AM

STRESS CONTROL IN NIV, CR AND TIW THIN FILMS USED IN UBM AND BACKSIDE METALLIZATION
Kathy O'Donnell, John Kostetsky, Johannes Chiu, Dick Post, NEXX Systems LLC 

THE UNIQUE CHARACTERISTICS AND PROPERTIES OF UTILIZING AN ELECTROPLATED CU STUD AS THE FOUNDATION OF A SOLDER BUMP
Lorie Ludrosky, Sharon Furcone, Les Griffith, Doug Mitchell, Motorola 

300MM WAFER BUMPING: PRINTING SYSTEMS AND TECHNOLOGIES
Joachim Kloeser, P. Kasulke, O. Dinse, J. Meyers, R. Heynen, M. Tpper, EKRA GmbH

LUNCH IN THE EXHIBIT HALL: NOON - 1 PM


SESSION 3: FLIP CHIP APPLICATIONS
1 pm - 4:30 pm
SESSION CHAIRS: R. WAYNE JOHNSON, AUBURN UNIVERSITY; JULIAN PARTRIDGE, XETEL

CHARACTERIZATION OF DIE STRESS IN FLIP CHIP ON LAMINATE ASSEMBLIES
Jeffrey Suhling, R. Wayne Johnson, M. Kaysar Rahim, Richard C. Jaeger, Auburn University

EVALUATION OF THE ELECTRICAL PERFORMANCE OF FLIP CHIP DEVICES
N. Suthiwongsunthorn, A. Cordery, N. Kilbey, Oxford Brookes University

A LEAD-FREE FLIP-CHIP SOLUTION FOR HIGH FREQUENCY APPLICATIONS
Lewis Hwan, Fei-Jain Wu, Chipbond Technology Corporation

REFRESHMENT BREAK IN THE EXHIBIT HALL: 2:30 PM - 3 PM

ADVANCES IN BUMPING, FLIPCHIP, AND WAFER LEVEL PACKAGING PRODUCTION
John Hunt, J.J. Lee, Steve Fang, Mike Hung, Mason Lin, Advanced Semiconductor Engineering Inc. (ASE)

SOLDERJET PRINTING: WAFER BUMPING AND 3D-PACKAGING
Donald J. Hayes, MicroFab Technologies, Inc.

SILVER-FILLED POLYMER FLIP CHIP ASSEMBLY: AN OVERVIEW OF CURRENT APPLICATIONS AND TEST DATA
Jim Clayton, Polymer Flip Chip Corp

RECEPTION: 5 PM - 5:30 PM
DINNER: 5:30 PM - 6:30 PM

SESSION 4: ADVANCEMENTS IN UNDERFILL TECHNOLOGIES
7 pm - 9:30 pm
SESSION CHAIRS: DAVID PEARD, EMERSON & CUMING; MAURICE EDWARDS, LOCTITE ELECTRONICS MATERIALS

RECENT DEVELOPMENTS IN FLIP CHIP UNDERFILL ENCAPSULANTS WITH IMPROVED COMPATIBILITY WITH NO CLEAN FLUXES
Maurice E. Edwards, Michael Todd, George Carson, Bruce Chan, Loctite Electronics Materials

DEVELOPMENT AND RELIABILITY OF WAFER SCALE APPLIED REWORKABLE FLUXING UNDERFILL FOR FLIPCHIP ATTACHMENT
Lawrence Crane, Mark Konarski, Erin Yaeger, Afranio Torres, Rebecca Tishkoff, Paul Krug, Henkel/Loctite Corp.; R. Wayne Johnson, Auburn University; Mark Chason, Jan Danvir, Nadia Yala, Jing Qi, Motorola 

COMPARISON OF SCANNING ACOUSTIC MICROSCOPY AND X-RAY ANALYSIS AS ANALYTICAL TOOLS FOR DETECTING UNDERFILLED FLIP CHIP DEFECTS
Todd Snively, David Lehmann, Jim Stradling, Raytheon Electronic Systems

PREDICTIVE MODELING OF UNDERFILL AND FLUX COMPATIBILITY FOR AREA ARRAY ASSEMBLIES
Douglas Katze, Emerson & Cuming Specialty Polymers

DEVELOPMENT ASPECTS FOR SINGLE PASS HIGH-RELIABILITY FLIP CHIP REFLOW ENCAPSULANTS
Robert M. Echols, Michael J Peterson, Antai Xu, Seagate Technologies LLC; Jean Liu, LindaWong, Fritz Byle, Northrop Grumman Corporation

WEDNESDAY, JUNE 26

CONTINENTAL BREAKFAST: 7 AM - 8 AM

SESSION 5: WAFER LEVEL CSP TECHNOLOGY OVERVIEW
8 am - 11 am 
SESSION CHAIRS: TED TESSIER, AMKOR TECHNOLOGIES; ROD MARTENS, FORM FACTOR

NEW REWORKABLE CSP/BGA UNDERFILLS FOR HIGH-SPEED ASSEMBLY
Paul Morganelli, Matthew Laffey, Emerson & Cuming; Michael Meilunas, Murtuza Rampurawala, Universal Instruments

A Cost breakthrough in Wafer Level CSP
Rudy Chen, Altex Technology Corp. and Tony Shen, CTS Computer Technology System Corp. 

THE STATE OF WLCSP INFRASTRUCTURE TODAY
Theodore G. Tessier, Amkor Technologies

REFRESHMENT BREAK: 9:30 AM - 10 AM

RELIABILITY EVALUATION OF DRAM MOST(tm) WAFER LEVEL PACKAGE MODULES
Barbara Vasquez, V. Strutz, Infineon Technologies; R. Martens, B. Neal, Form Factor Inc.

XTREME CSP(tm): MOTIVATIONS FOR A BREAKTHROUGH
Glenn Rinne, Dan Mis, Robert Lanzone, Unitive, Inc.

LUNCH: NOON - 1PM


SESSION 6: FLIP CHIP MODELING, DESIGN AND ELECTRICAL TEST
1 pm - 5 pm
SESSION CHAIRS: LARRY GILG, DIE PRODUCT CONSTORTIA; ANDREW MAWER, MOTOROLA SPS

ALTERNATIVES FOR PRODUCING BURNED-IN BARE DIE
Steve Steps, Aehr Test Systems

PYRAMID PROBE HIGH VOLUME SOLDER BALL PROBING RESULTS FOR KNOWN-GOOD-DIE 
Ken Smith, Cascade Microsystems 

AN INTEGRATED SOLUTION FOR KGD-AT-SPEED WAFER-LEVEL TESTING AND WAFER-LEVEL BURN-IN AFTER FLIP CHIP BUMPING
An-Hong Liu, Yuan-Ping Tseng, ChipMOS 

INDUCTANCE CHARACTERIZATION OF FINE PITCH FLIP CHIP BUMPS
Jerry Roach, Andy Feng, Orient Semiconductor Electronics (OSE)

REFRESHMENT BREAK: 3 PM - 3:30 PM

PATTERN DRIVEN FLIP-CHIP PADRING GENERATION
Peter Dahl, ReShape, Inc.

PHYSICAL STRUCTURE TO ENABLE HIGH-DENSITY AC COUPLED INTERCONNECTION
Stephen Mick, Paul Franzon, NC State University

SOLDER BUMP AND SUBSTRATE PAD BASED DESIGN CONSIDERATIONS FOR IMPROVED MANUFACTURABILITY
Tarak A. Railkar, Suresh Jayaraman, Robert W. Warren, Conexant Systems, Inc.


CONCLUDING REMARKS: 5 PM - 5:15 PM


Register On-line Now and $ave

View List of 2002 Exhibitors

We're Filling Up Fast...Reserve Your Exhibit Now

 

 



© Copyright 2010 IMAPS - All Rights Reserved
IMAPS-International Microelectronics And Packaging Society and The Microelectronics Foundation
611 2nd Street, N.E., Washington, D.C. 20002
Phone: 202-548-4001

<% rsCategory.Close() Set rsCategory = Nothing %>