Search this site



 

Advance Technical Program

Technical Sessions (Wednesday - Thursday - Friday) | Professional Development Courses (PDCs) | Online Registration | "Program at a Glance" | Message From The Chairs | "Destination Denver" | Spouse-Guest Program | Exhibitor Information | List of Exhibitors | Hotel Information | Golf Classic

*View the Final Program*

Download a PDF of the 32-page Program

Wednesday, September 4, 2002

WA1
High Density Substrates & Boards
Chairs: Rajen Chanchani, Sandia National Laboratories; Andrew Strandjord, IC Interconnect
8 am - 11:25 am

Several advanced, high density substrate and board technologies will be presented. Some of the innovative technologies that will be included are advanced boards with liquid crystal polymer dielectric, a new stacked via technology, a new organic laminate technology for better electrical performance at over GHz frequencies, high interconnect density organic boards for UNIX servers, copper nano-composites for PWBs and polymer based photo-imageable dielectric. 

Assembly on Liquid Crystal Polymer (LCP) Substrates for Advanced Packaging
R. Wayne Johnson, Tan Zhang, Auburn University; Brian Farrell, Foster Miller

High-Performance Flip-Chip BGA based on Multi-Layer Thin-Film Packaging Technology
Tadanori Shimoto, Katsumi Kikuchi, Hirokazu Honda, Keiichiro Kata, Kazuhiro Baba, Koji Matsui, NEC Corporation

A New Stacked-Via Formation Technology for High-Density Build-Up Packages
Tomoyuki Abe, Nobuyuki Hayashi, Motoaki Tani, Yasuhiro Yoneda, Fujitsu Laboratories Ltd.

Over GHz Signal Transmission of the Simultaneous Curing Multilayered Substrate
Takuji Seri, Shigeru Kamoi, Kenji Kume, Katsura Hayashi, Masahiro Fukui, Kyocera Corporation

Packaging Technology for High Performance UNIX Server
Masateru Koide, Fujitsu Limited

PAMAMOS Copper Nanocomposite Coatings for the Fabrication of Printed Wiring Boards
David A. Dalman, Petar R. Dvornic, M. Frederick Hoover, Dendritech, Inc.

Cardo Polymer Based Photo Imageable Dielectric
Masahiko Takeuchi, Hironobu Kawasato, Shinji Inaba, Kazuhiko Mizuuchi, Takero Teramoto, Nippon Steel Chemical Co., Ltd.


WA2
LTCC Manufacturing Issues
Chairs: Ken Kuang, Kyocera America, Inc.; Aziz Shaikh, Ferro Electronic Materials
8 am - 11:25 am

The continuous drive of making LTCC products better and cheaper has challenged many engineers and scientists alike to address manufacturing issues. This session discusses two pioneering ways to achieve high-density circuit traces, three novel LTCC material systems, one new process monitoring technique and an innovative manufacturing method to make LTCC monolithic transformers.

Cold Low Pressure Lamination of LTCCs
Andreas Roosen, University of Erlangen - Nuremberg

Fine Line LTCC-RF-Circuits by Direct Gravure Printing (DGP) Method
Juha Hagberg, Marko Kittilä, Eino Jakku, Seppo Leppävuori, University of Oulu

CaRuO3 Thick Film Resistor Formulations Compatible with LTCC Co-Firing
Randy Klein, W. Kinzy Jones, Florida International University

Characterization of Unrestrained Zero Shrink LTCC Material System for Volume Production of RF LTCC Modules
Michael R. Ehlert, Barbie Spenser, National Semiconductor LTCC Foundry; Frans Lautzenhiser, Edmar Amaya, Heraeus Inc. – CMD

High K and Magnetic Materials for Buried Components
Alvin Feingold, S.J. Stein, C.Y.D. Huang, M. Heinz, R.L.Wahlers, Electro-Science Labs, Inc.

Optical Dilatometer for Insitu Measurements of Warpage Effects during Firing of LTCC Multilayer Structure
Matthias Wagner, Alfons Stiegelschmitt, Andreas Roosen, Franz Bechtold, Dieter Schwanke, Department of Materials Science, Glass and Ceramics

Low Profile Transformers using Low Temperature Co-fire Magnetic Tape
John Bielawski, George Slama, A.H. Feingold, C.Y.D. Huang, M.R. Heinz, R.l. Wahlers, Midcom Inc.


WA3
MEMS & MEMS Applications
Chairs: David Galipeau, South Dakota State University; Janet Lumpp, University of Kentucky
8 am - 11 am

The focus of this session is on advancements in MEMS including pressure sensing, GaAs structures and MEMS packaging.

Design by Analysis of a MEMS Pressure Sensor
Ryszard J. Pryputniewicz, Cosme Furlong, Emily J. Pryputniewicz, Worcester Polytechnic Institute

Mechanically Fixed and Thermally Isolated Micromechanical Structures for GaAs Heterostructure Based MEMS Devices
Tibor Lalinsky, Milan Drzik, Martin Tomaska, Stefan Hascik, Zelmira Mozolova, Ivan Kostic, Ladislav Matay, Slovak Academy of Sciences

Laser-Assisted Selective Bonding for Wafer-Level & Chip-Scale Vacuum Packaging of MEMS
Yi Tao, Ajay P. Malshe, W. D. Brown, University of Arkansas

Reliability Testing of Flexible Circuit-Based RF MEMS Switches
Simone Lee, Nasun Na, Ramesh Ramadoss, Victor Bright, K.C. Gupta, Y.C. Lee, University of Colorado at Boulder

One Packaging Technique of Exposed MEMS Sensors
Zhigang Lin, Rick Yoon, IJ Research, Inc.

Strategies for Successfully Integrating MEMS Die onto Laminate
Robert Dean, R. Wayne Johnson, Holly Garrison, Nicole Schutz, Auburn University; Mike Kranz, Morgan Research Corporation; Bill Bowers, Bill Payne, ITRI; Ron Legowik, AMRDEC-U.S. Army


WA4
Area Array Interconnects
Chair: Roupen Keusseyan, DuPont Microcircuit Materials
8 am - 11:25 am

Surface mount technologies rely heavily on solder interconnect methods. To achieve acceptable service life, both materials properties and the application environment must be factored into packaging of electronics for specific applications. These papers present some of the significant aspects of packaging using solder interconnections.

Design and Characterization of a 10GHz Organic BGA Package
Richard R. Lynn, Maxtek Components Corp.

Qualification of Plastic Ball Grid Array Packages for Space Flight Applications
Thomas Estes, Yoshio Saito, TRW

A Study of Solder Joint Reliability of TFBGA Assemblies with Fresh and Reworked Solder Balls
Po Jen Zheng, J.Z. Lee, K.H. Liu, J.D. Wu, S.C. Hung, Advanced Semiconductor Engineering, Inc.

Long Time Reliability of Flip Chip Interconnections on Flexible Substrates
Barbara Pahl, Christine Kallmayer, Rolf Aschenbrenner, Herbert Reichl, Fraunhofer Institute of Reliability and Microintegration IZM

Placement and Reflow of Solder Balls for FC, BGA, Wafer-Level-CSP, Optoelectronic Components and MEMS by using a Mew Solder Jetting Method
Thomas Oppert, L. Titerle, G. Azdasht, E. Zakel, Pac Tech - Packaging Technologies GmbH

Measurements and Simulation of SMT Components
Ryszard J. Pryputniewicz, David Rosato, Cosme Furlong, Worcester Polytechnic Institute

SMT: Modeling and Uncertainty Analyses of a J-Lead Attachment
Ryszard J. Pryputniewicz, Cosme Furlong, Dariusz R. Pryputniewicz, Worcester Polytechnic Institute


WA5
System Packaging
Chair: Christian M. Val, 3DPlus
8 am - 11 am

The dictionary defines a system as “a group of things or parts connected in some form to make a whole.” Systems Packaging is essentially the electromechanical process or technique of connecting the parts of the system together.  These papers demonstrate various examples of the latest thinking in systems packaging that allow for high density integration.

SiP Design for Higher Integration
Nozad Karim, Amkor Technology; Tania Van Bever, Alcatel Microelectronics

Wafer Level Batch Transfer Process of RF MEMS Passive Devices using PDMS
Sang Won Park, Kabseog Kim, Jeong-Bong Lee, University of Texas at Dallas

High Density Packaging for Wrist Wearable Medical Devices
Etienne Hirt, Michael Scheffler, Art of Technology

Very High Speed 3D “System in Package”
Christian M. Val, 3DPlus

System-on-Package (SOP): A Solution for Next Generation Convergent Microminiaturized Microsystems
Rodolfo L. Gacusan, Intel Technology Philippines, Inc.

Modular Systems for Sensor Integration
Matthias Klein, H. Oppermann, R. Aschenbrenner, H. Reichl, Fraunhofer IZM – Berlin


WP1
Recent Developments in Wafer Level CSPs
Chairs: Curtis Zwenger, Amkor Technology; Li Wetz, Motorola SPS
2:30 pm - 5:30 pm

Wafer Level CSP (WLCSP) technologies hold tremendous promise for reducing the form factors of small integrated circuits and other passive devices with I/O counts typically below 50 I/O. Since low I/O leadframe based SMT packages are not particularly space efficient, the migration of these modest components to wafer scale can have quite a dramatic influence on product minituarization. This session will outline advancements that are being made in the development of wafer scale solutions including traditional ICs and MEMS to name a few as well as to highlight recent developments in process development and WLCSP reliability. 

Assembly Process for High Brightness LEDs using the AuSn Metallurgy
Gordon Elger, Rafael Jordan, Maria v. Suchodoletz, Hermann Oppermann, Fraunhofer Institut for Reliability and Microintegration

Materials for 300 mm Wafer Level Packaging
Michael J. Toepper, Fraunhofer IZM; A. Achen; Dow-Chemical Company; Ch. Lopper, K. Hauck, K. Samulewics, V. Glaw, H. Reichl, Fraunhofer Institute for Reliability & Microintegration IZM

Design and Reliability of a New WL-CSP
Li Wetz, Beth Keser, Jerry White, Motorola, SPS

Wafer Scale CSP
Joe Smetana, Alcatel, USA; Deborah Patterson, Flip Chip Technology; Dennis Krizman, Celestica; David Love, Sun Microsystems; Theo Ejim, Lucent

Experimental and Analytical Study on Large Passivation Opening to Improve Solder Joint Reliability for microSMD Packages
Vivek Arora, Li Zhang, Luu Nguyen, Nikhil Kelkar, National Semiconductor Corporation

Cost Effective, High Reliability, Low Profile WLP
Hirohisa Matsuki, Masamitsu Ikumo, Mario Aguirre, Yoshitaka Aiba, Mitsutaka Sato, Fujitsu Limited


WP2
Packaging Materials
Chairs: Herbert J. Neuhaus, NanoPierce Connection Systems, Inc.; Michael E. Wernle, NanoPierce Card Technologies, GmbH
2:30 pm - 5:30 pm

This session presents cutting-edge developments at the intersection of the two most dynamic areas of packaging. Previously wafer-level packaging and lead-free solders have been generally considered separately. Now, as these emerging areas mature, their interactions come to the fore as critical issues for study.

Wafer-Level Underfill Materials and Processes for Pb-free Flip-Chip Applications 
Claudius Feger, Nancy LaBianca, Hosadurga Shobha, Gareth Hougham, Peter Gruber and Steve Buchwalter, IBM T. J. Watson Research Center; Mike Gaynes, Miguel Jimarez, IBM Interconnect Products; Allison Xiao, Gyan Dutt, Stanley Kong, Don Herr, Quinn Tong, National Starch and Chemical

Effects of Flexibilizers on the Properties of Liquid Microelectronic Encapsulation Materials
Shaoqin Gong, Michael Todd, Loctite Corporation

Thermal Characterization of High Temp Reflow (HTR) Compatible Epoxy Molding Compound for Lead Free PBGA Packaging
Dennis Prem Kumar Chandran, Yi He, Intel Technology Sdn., Bhd

Investigation of Electroplated Ni and Ni-Cu Alloy UBM (Under bump Metallurgy) with Lead-Free Solders for Flip Chip Packages
Su-Hyeon Kim, Jong Yeon Kim, Jin Yu, KAIST

Development of Single Pass Reflow Encapsulant for Lead Free Solder Bump
Lin Xin, Rich Kraszewski, Jin Liu, Chad Showalter, Jennifer Allen, SH Goh, Linda Wong, Northrop Grumman Component Technologies – Kester

Phase Transformation and Residual Stress Evolution in Electroless Ni-P UBM used in Low Cost Flip Chip Technology
J. Y. Song, Jin Yu, KAIST

WP3
RF Design and Measurements & Wireless Applications
Chairs: F. D. Barlow, University of Arkansas; John Gipprich, Northrop-Grumman
2:30 pm - 5:30 pm

This session addresses design and measurements of RF and wireless applications. These applications include RF MEMS, LMDS, RF radio links, LTCC and embedded passives, multiplexer/demultiplexer package, and T/R modules.

RF MEMS: Modeling and Simulation of Switch Dynamics
Ryszard J. Pryputniewicz, Patrick W. Wilkerson, Andrzej J. Przekwas, Cosme Furlong, Worcester Polytechnic Institute

LMDS Applications and RF Radio Links go for SMD Based Module Technology - Reality, Experience and Future Trends
Martin Oppermann, EADS Deutschland GmbH

Multiple Conductor Gridded Ground Planes for Enhanced Manufacturability and RF Performance LTCC Passive Components
George Passiopoulos, Kevin Lamacraft, Nokia Networks

Microwave Module Design with HeraLock™ 2000 LTCC
Frans Lautzenhiser, Edmar Amaya, Peter Barnwell, Brent Smith, Jim Wood, Heraeus Inc. - Circuit Materials Division

Simulation and Design Methodology for a 50Gb/s Multiplexer/Demultiplexer Package
Lei Shan, Mounir Meghelli, Joong-Ho Kim, Jean Trewhella, Modest Oprysko, IBM Corp., T. J. Watson Research Center

Embedded Passives and T/R Module for Millimeter-Wave Fabricated by the Photoimageable Thick Film Process
Seong-Dae Park, Y. S. Lee, C. S. Yoo, and J. C. Park, Erick Kim, Korea Electronics Technology Institute


WP4
Thermal Management
Chairs: Ajay P. Malshe, University of Arkansas; Matt Gordon, University of Arkansas
2:30 pm - 5:30 pm

Demands and advances in the thermal management area are highlighted in this session through various presentations by leading researchers on topics such as miniaturized heat pipes, reliability of high power optical devices, analysis and modeling.

Thermal Modeling and Measurement of Large High-Power Silicon Devices with Asymmetric Power Distribution
Jeffrey Deeney, Hewlett Packard Company

Thermally Enhanced PBGA: Thermal Performance and Reliability at High Temperatures (Pb-free)
Swaminath Prasad, Flynn Carson, Bret Zahn, TK Lee, ChipPAC Incorporated 

Packaging and Thermal Management for kW/cm2 Microwave Amplifiers
Zhigang Lin, Rick Yoon, IJ Research, Inc. 

Development of a Re-workable Film in High Performance Thermal Management Applications
Chih-Min Cheng, Andrew Collins, Emerson & Cuming 

Manufacturing and Heat Transfer Characteristics of the Flat Micro Heat Pipe
Seok Hwan Moon, Sang Choon Ko, Gunn Hwang, ETRI

Heat Sink Design Optimization for Optical Transponders
Zhaofeng Shi, Albert Lu, Yeow Meng Tan, Kar Hwee Ang; Eric Tan, Roson Tan, E2O Communications Pte Ltd.


WP5
Marketing Forum

The MMRC (Microelectronics Marketing Research Council) will offer a free-of-charge Marketing Forum to all IMAPS 2002 attendees who wish to participate. The Forum will feature four presentations with a  panel discussion at the end that will allow for audience participation in this not to be missed event! See page 26 for more information.


Thursday, September 5, 2002

THA1
3D and High Performance Packaging in Japan (Japanese Translated Session)
Chairs: Yuzo Shimada, NEC Corporation; Charles E. Bauer, TechLead Corporation
8 am - 11 am

Building on the road map for high density packaging presented in the first paper, this session demonstrates the significant advances in three dimensional semiconductor packaging concepts and technology taking place in Japan. These innovations range from the high density substrate technologies necessary to accomplish three dimensional packaging through the intricate design concepts under consideration to the complex assembly processes required.

High Density Packaging Technology Research & Development Roadmap in Japan
Manabu Bonkohara, ASET-Association of Super-Advanced Electronics Technologies

High-Density System-On-Film (SOF) using Two-Metal Layer Tape
Yasuhisa Yamaji, Sharp Corporation

Investigation of Fundamental Technology for 3D Assembly
Kei Murayama, Shinko Electric Co., Ltd.

Ultra-high-density Interconnection Technology of 3-dimensional Packaging
Kenji Takahashi, ASET-Association of Super-Advanced Electronics Technologies

Thermosonic Flip Chip Bonding for Low Cost Packaging
Taizo Tomioka, Toshiba Corporation

Ultra Thin & High Density Packaging Using Both Sides Flip Chip Technology
Kazuto Nishida, Matsushita Electric Industrial Co., Ltd.


THA2
RF and Microwaves Components Realization
Chairs: A. Elshabini, University of Arkansas; Daniel Amey, Dupont Microcircuit Materials
8 am - 11:25 am

This session describes RF and Microwaves components realization for MEMS switch, MEMS variable capacitor, LTCC filter, a slit cavity resonator, and microwave power amplifier. Impact of fine line technique and processing parameters on electrical properties and accurate prediction of these properties are covered in the session.

Gold Stud Bump Bonding for High Frequency Packaging: Impact of Gang Coining and other Process Variables on Electrical Properties
Taekyeong Lee, Alan M. Lyons, Sean Shih, Andy Becker, Carsten Metz, Lucent Technologies, Bell Labs

Mechanical and Electrical Design of a Novel RF MEMS Switch for Cryogenic Applications
Huantong Zhang, Victor M. Bright, Y.C. Lee, K.C. Gupta, University of Colorado

Frequency Tunable Half-wave Resonator using a MEMS Variable Capacitor
Patrick Bell, Nils Hoivik, Victor M. Bright, Zoya Popovic, University of Colorado at Boulder

Accurate Prediction of Microstrip Impedance and Attenuation at MM-Wave Frequencies
Didier Cottet, Janusz Grzyb, Gerhard Troester, ETH Zurich, Electronics Laboratory

The Fine-line Technique in the Fabrication of LTCC Filter
W. S. Lee, Y.J. Lin, F.T. Shiao, C.W. Tang, J.S. Hsieh, Phycomp Taiwan Ltd.

Dielectric Constant and Loss Tangent Measurement for 2-Layer Dielectric Samples using a Slit Cavity Resonator
Zhengrong Tian, Middlesex University; Charles Free, Colin Aitchison, University of Surrey; Peter Barnwell, Heraeus Circuit Materials Division

A High Performance 5.8 GHz Power Amplifier Design Enabled by a New Microwave Power Package
John W. Roman, Steven C. Evangelista, SatCon Technology - Film Microelectronics Incorporated


THA3
Power Packaging Technologies
Chairs: Douglas C. Hopkins, University at Buffalo; Dave Kellerman, Material Solutions
8 am - 11 am

This session provides applications and techniques starting with a 55kW automotive power module, followed by an update on polyimide flex to interconnect power chips in a very high density module. Ceramic is still a major development area with new characterizations reported in thermal vias imbedded into LTCC and new resistor formulations to combat cost increases. Finally, two papers provide detailed technical analysis of degradation due to high power effects.

Packaging and Thermal Management of AIPM
Yuejian Chen, John Mookkeen, Victor Temple, Silicon Power Corporation

A High Performance Polymer Thin Film Power Electronics Packaging Technology
Raymond A. Fillion, Eladio Delgado, Paul McConnellee, Richard Beaupre, GE Global Research Center

High Density Thermal Vias in Low Temperature Cofire Ceramic (LTCC)
W. Kinzy Jones, Marc Zampino, Ravindra Kandukuri, Yanquin Liu, Florida International University

A New Generation of Low Cost Surge Resistor Materials
Michael Moroz, Aziz Shaikh, Ferro Electronic Materials

Measurement and Effects of High Electrical Current Stress in Solder Joints
Hua Ye, Douglas C. Hopkins, Cemal Basaran, Alex Cartwright, University at Buffalo, SUNY

Thermal Hot Spots under Low Duty Cycle High Power Applications
Kenneth Rispoli, Raymond Fitzsimmons, Lee Gould, Jason Leandro, Raytheon Company


THA4
Sensors Packaging
Chairs: David Galipeau, South Dakota State University; Richard Gehman, Honeywell, Inc.
8 am - 11 am

This session covers advancements in thick film sensors as well as new packaging methods for sensor arrays, MEMS and IR detection.

A Study of Factors Affecting Characteristics of Thick Film NTC Thermistors
David J. Nabatian, KOARTAN Microelectronic Interconnect Materials

An Evaluation of Materials and Processes Employed in the Construction of Novel Thick Film Force Sensors
Yulan Zheng, University of Southampton; John Atkinson, Russ Sion, C-Cubed Limited

Investigations of Thick-Film Resistors on different Substrates for Strain Gauge Applications
Darko Belavic, HIPOT; Marko Hrovat, Andreja Bencan, Jozef Stefan Institute; Walter Smetana, Heinz Homolka, Roland Reicher, Vienna University of Technology; Leszek Golonka, Andrzej Dziedzic, Jaroslaw Kita, Wroclaw University of Technology

Fluxless High-Vacuum Packaging of MEMS and IR Sensors
Cory Jenkins, SST International

A Novel Flex Circuit Area-Array Interconnect System for a Catheter-Based Ultrasound Transducer
Scott Corbett, Jeff Strole, Warren Lee, Stephen Smith, Duke University

The Package and Thermal Management of Infrared (IF) Sensors
Zhigang Lin, Rick Yoon, IJ Research, Inc.


THA5
Advanced Interconnect and Wire Bonding
Chair: Lee Levine, Process Solutions Consulting
8 am - 11:25 am

Interconnections have greatly broadened in scope of late. Wire bonds continue to be the most used interconnection method, but new methods and non-traditional applications continue to appear. This session gives recent advancements in both wire bonding and in some less traditional means of interconnection.

Anisotropic Conductive Adhesive for Flip Chip on Paper Assembly
Jad Rasul, Bill Olson, Motorola Inc.

Comparison of 60-kHz and 100-kHz Wirebonding on Organic and Inorganic Substrates
Harry K. Charles, Jr., K.J. Mach, S.J. Lehtonen, A.S. Francomacaro, J.S. DeBoy, R.L. Edwards, The Johns Hopkins University/APL

Elevated Temperature Failure Mechanisms in Au-Al Ball Bonds
Narendra J. Noolu, Mark Klossner, Kevin Ely, William Baeslack, John Lippold, Palomar Technologies

Process Solutions for Technological Challenges in Assembly of Hybrid and MCM Packages
Ivy Wei Qin, Guy Frick, Bob Wise, Kulicke and Soffa Industries Inc.

TiN Coating - A Solution for High Temperature Interconnects
H. Ryu, R.A. Saravanan, Rishi Raj, University of Colorado at Boulder

Laser Processing of Flexible Substrates
Peter Gordon, Richard Berenyi, Budapest University of Technology and Economics

Potential of Flip Chip Technologies for Chip Stacking Applications
Holger Woerner, Infineon Technologies



THP1
Automotive Electronics
Chair: D. H. R. Sarma, Delphi
2 pm - 3:15 pm

According to Global Information, Inc., worldwide demand for OEM automotive electronics will expand 6.8 percent per year to $97.5 billion in 2005. This specially designed session explores some of the latest technical developments in methods for micro machining sensor arrays; contains information about new polymeric materials used for environmental protection of sensitive electronics in severe operating environments and provides a comprehensive look at developments in lead-free packaging for automotive electronics.

A Study of a Micromachined Sensor Array for Automotive Emissions
Jason D. Sternhagen, Kraig D. Mitzner, Eric J. Berkenpas, Wade Kempf, David W. Galipeau, South Dakota State University

An Evaluation of Materials for the Environmental Protection of Automotive Sensors
Kate Pearce, Elizabeth Walker, Jiazhong Luo, RoseAnn Schultz, Emerson & Cuming

Packaging Technology for Automotive Electronics in the Lead-free Era
Hans Danielesson, MIKROELEKTRONIK KONSULT AB


THP2
Thick Film I
Chair: Richard Sigliano, Kyocera America, Inc.
2 pm - 5:25 pm

This session discusses topics from high temperature semiconductor materials for packaging of MEMS devices to a variety of thick film printing materials for AlN substrates and fine line processing. Also of interest to the thick film and quality engineer is a paper on Lead-free thick film resistor materials and characterization. Rounding out the session is a study of microvia fabrication in conjunction with LTCC materials.

SiCN Ceramic - A High Temperature Semiconductor Material for MEMS Applications
R. A. Saravanan, Li-Anne Liew, Victor M. Bright, Rishi Raj, University of Colorado at Boulder

New Lead-Free Thick Film Resistors
Jacob Hormadaly, Ben-Gurrion University

MCM- D/C Based on Cu/ BCB Thin Film and LTCC; Lessons Learned
Fred D. Barlow, Errol Porter, Jeff Mincy, Len Schaper, Aicha Elshabini, University of Arkansas

Thick-Film Printable Polymer Insulator Paste: Development, Testing and Results
Khalil Arshak, David Egan, University of Limerick

Structural Optimization for Ultra Fine Pad Pitch LDI Devices
Jin-Hyuk Lee, Sa Yoon Kang, Dae-Woo Son, Kwan-Jai Lee, Se-Yong Oh, Samsung Electronics, Co. Ltd.

Novel Thick Film System on AIN Substrates
Yueli Wang, Alan Carroll, Jerome Smith, Yong Cho, John Crumpton, Dave Anderson, Rudy Bacher, Christopher Needes, DuPont iTechnologies

A Mixed Metal Low Loss Dielectric Materials System for High Frequency Applications
Christopher R. Needes, Michael A. Smith, DuPont Company


THP3
Passive Integration in PWB, Thin Film and On Chip Technologies
Chairs: Dr. Robert Heistand II, AVX Corporation; Richard Charbonneau, StorageTek
2 pm - 5 pm

Passive component integration is a very active packaging development area to increase performance, increase system yields, miniaturize systems and reduce system costs.  Presentations on three very different vehicles for passive integration will be presented.  These include continuing developments from thin film technology and PWB embedded components/materials along with the new thrust in thin film integrated passives on active chip.

Embedded Passives Technology for PCBs: Materials, Design, and Process
Jiming Zhou, John Myers, Delphi Delco Electronics Systems; John Felten, DuPont; Richard Snogren, Coretech/SAS; Kim Fjedsted, ESI; Bob Greenlee, Merix; Joel Peiffer, 3M 

Composite Dielectric Laminate for Integrated Capacitors
Kirk Slenes, Tuqiang Chen, Erik Luther, TPL Corp.

Novel Structure of Integral Passive Substrate and the High Frequency Characteristics
Shigeru Utsumi, Hirofumi Fujioka, Hideki Tsuruse, Mitsubishi Electric Corp.

High-Q RF Inductors Fabricated using WLP Redistribution Technology
Quan Tran, Qing Ma, Intel Corporation

High-Q inductors on Low Resistivity Silicon through Wafer Post-Processing
Geert Carchon, W. De Raedt, E. Beyne, IMEC-MCP/HDIP

Integrated Capacitors for Multichip Module Packaging Applications
Allen C. Keeney, A. Shaun Francomacaro, Richard L. Edwards, Harry K. Charles, Jr., Johns Hopkins University/APL


THP4
Novel Manufacturing Technology
Chairs: Nicole Cavanah, Rockwell International; David Virissimo, Hi-Q Materials, Inc.
2 pm - 5 pm

The pursuit for smaller, higher density and affordable assemblies increases the challenges for robust manufacturing. This session highlights techniques developed to achieve robust manufacturing and integrated testing processes with ever-increasing challenges facing microelectronics packaging and assembly. New manufacturing developments include die pick and place, wire bonding, area array assembly, RF modules and optoelectronic assemblies.

Thick and Thin Film Materials
Kevin Blakelock, Motorola Inc. 

System Considerations for Active Laser Trimming of Bluetooth Modules
Joe Lento, Yun Chu, Bruce Couch, GSI Lumonics

Ultrasonic Bonding: Understanding How Process Parameters Determine the Strength of Au-Al Bonds
Michael Mayer, ESEC; Juerg Schwizer, ETH Zurich

Yield Improvement Methodologies for Flip Chip Assemblies Using Solder On Pad (SOP) Substrates
Sarathy Rajagopalan, Mukul Joshi, Kishor Desai, LSI Logic Corp.

Fully Integrated Solution for CBGA Inspection : A New Approach to meet High Mix and High Volume Challenges
Nicolas Tessier, IBM Canada

Automated, In-Line Leak Testing of Hermetic Optoelectronic Packages
John W. Newman, NorCom Systems Inc.


THP5
Reliability
Chairs: James T. Cook, Microelectronic Business Associates; Greg Caswell, Xetel Corporation
2 pm - 5:25 pm

The papers in this session focus on the design and reliability of interconnect materials and processes. Specific interest will be in the SMT and Flip Chip interconnect reliability concerns. The targeted audience for this session are for packaging, reliability and process engineers and technicians.

Impact of Under Bump Metallurgy on Solder Joint Reliability of Flip Chip on Low Temperature Co-Fired Ceramic Substrate
Ning Duan, J. Scheer, J. Bielen, M. van Kleef, Royal Philips Electronics B.V. 

Effect of the Al Pad Surface Morphology on the Flip-Chip Solder Joint Reliability
Esther W.C. Yau, Simon P.C. Law, J. Z. Wei, Philip C.H. Chan, Hong Kong University of Science and Technology

Electromigration in WLCSP Solder Bumps
Glenn A. Rinne, Krishna K. Nair, Julia Roe, Unitive, Inc.

Materials Characterization and Finite Element Analysis of the Effect of Mechanical Bending on Area Array Package Interconnects
Daniel T. Rooney, Dongji Xie, N. Todd Castello, Doug Abbott, Flextronics 

Material Set Comparison in Moisture Sensitivity Classification of Nonhermetic Organic Packages
William Schildgen, Cameron Murray, 3M

A Case Study in Test Vehicle Design for Real-Time Reliability Characterization
Dennis Krizman, Scott Waters, Alex Chen, Celestica International Inc. 

Solder Joint Reliability Testing of Back-to-Back Assembled BGA Components
Joyce E.S. Taylor, Dave Peters, Hewlett Packard


THP6
Interactive Forum (Poster Session)
1 PM – 4 PM

Evaluation of Two Novel Lead-Free Surface Finishes
Ning-Cheng Lee, Richard Ludwig, Chonglun Fan, Yun Zhang, Indium Corporation of America

Improved Long-Term Stability of Solder Joints through Rapid Reflowing
Fritz Herbert, Lutz Dorn, Technical University Berlin 

Beyond Periodic Pulse
Enrique Gutierrez, TecNu, Inc. 

WASPP Program: Advanced Passivation and near Hermetic Seals for Advanced Packages and Harsh Environments
Chuck Reusnow, Lockheed Martin Missiles and Fire Control - Dallas 

An Investigation of the Properties of New-Developed LTCC Materials for their use in Microwave Circuit
Hiroshi Usui, Kazunari Watanabe, Shotaro Watanabe, Kastutoshi Nakayama, Asahi Glass Co., Ltd.

Thermal Properties of New Composites of Diamond and Copper
Katsuhito Yoshida, Hideaki Morigami, Takahiro Awaji, Tetsuo Nakai, Sumitomo Electric Industries, Ltd.

Technical Challenges of Stencil Printing Technology for Ultra Fine Pitch Flip Chip Soldering
Dionysios Manessis, R. Patzelt, U. Oestermann, S. Nieland, A. Ostmann, R. Aschenbrenner, H. Reichl, Technical University of Berlin

Evolution of the SWIFT CZT Detector Module
Phillip A. Goodwin, Swales Aerospace 

The New Thick - Film Hybrid High Frequency Electronic Ballasts for Low Power Discharge Lamps
Janusz J. Gondek, Private Institute of Electronic Engineering; St. Kordowiak, W. Mysinski, Cracow University of Technology; B. Kawa, J. Kocol, Technical School of Communications; P. Gebik, P.P.U.H ‘GECO’ Ltd.; P. Szatynski, Cracow Electronics Works ‘TELPOD’

Challenge of Flip Chip Encapsulation Technologies
Kevin Chai, Eddy Wu, Roger Hsieh, J. Y. Tong, Siliconware Precision Industries Co., Ltd.

Flip-Chip Packaging Solution for CMOS Image Sensor Device
Jong-heon Kim, In-Soo Kang, Hak-Nam Kim, Esdy Baek, C-Cube Digital Corp., Ltd.; Tae-Jun Seo, Samsung Electro-Mechanics

Power Cycling Reliability of the First and Second Level Interconnections of Modules
Ning Duan, J. Scheer, J. Bielen, M. van Kleef, Royal Philips Electronics B.V.

Electroplated Micro-inductors and Micro-transformers for Wireless Applications
Jae Y. Park, Young Jun Chang, Jong Uk Bu, LG Electronics Institute of Technology

Structure of Cantilever with Implanted Strain Gauge
Miroslav Husak, Pavel Kulha, Jiri Jakovenko, Zdenek Vyborny, Technical University of Prague

A New High Resolution Process for Passives in Hybrid Packaging
Charles D.E. Lakeman, Patrick F. Fleig, TPL Inc.

Implementation of Integrated Packaging of DC/DC Converter and PFC IPEMs using Bumpless Interconnected Embedded Chip Technology
Zhenxian Liang, J. D. Van Wyk, Fred C. Lee, Virginia Tech

Investigations of the Effects of Gamma-Radiations on the Optical and Electrical Properties of Nickel Phthalocyanine (NiPc) Thick Film
A. Arshak, S. Zleetni, K. I. Arshak, J. Harris, University of Limerick

High Dose Optical and Electrical Sensor Dosimeter using Cobalt Phthalocyanine (CoPc) Thick Film
A. Arshak, S. Zleetni, K. I. Arshak, J. Harris, University of Limerick

Prediction of Shrinkage and Deformation During LTCC Device Production
Aravind Mohanram, Gary L. Messing, David J. Green, Pennsylvania State University

An Experimental Study of the Thermal Performance of Heat Pipe Embedded Cold Plate for Satellite Electronic Cooling
David Sarraf, Devarakonda Angirasa, Thermacore International 

New Microcontact for Separable, Reusable, High Digital Speed Level-2 Interconnections
Ryszard J. Pryputniewicz, Dimitry G. Grabbe, Dariusz R. Pryputniewicz, Worcester Polytechnic Institute

Materials for Ultrafine Printing of Conductors
Christopher Wargo, David Richard, Yvonne Kunz, Parelec Inc.

New Materials for High Performance No-Flow Underfill
Kathleen M. B. Gross, Steve C. Hackett, Donald G. Larkey, William J. Schultz, Wendy Thompson, 3M

Design and Reliability Study for Flip Chip Applications on Ultra-Thin Flexible Substrates Using NanoPierce Connection System Technology
Bin Zou, M. Kober, F. Blum, S. Mieslinger, L. Gaherty, W. Steinberg, B.Bahn, M. Wernle, H. Neuhaus, NanoPierce Technologies, Inc.

Backside Silicon Thinning Techniques for Failure Mode Analysis
Huixian Wu, James Cargo, Barry Dutt, Albert Seier, Joe Serpiello, James Mcginn, Agere Systems

Wire Bonding Study of Gold Conductors for LTCC Applications
Liang Chai, Cristina Lopez, Aziz Shaikh, Vern Stygar, Ferro Corporation

Multilevel Digital Micromirror Array with Enhanced Fill Factor by Flip-Chip Transfer
Jianglong Zhang, Y.C. Lee, Yu-Chen Lin, John Neff, University of Colorado at Boulder

Patternable Compliant Silicone Materials for Advanced Packaging Applications
Brian R. Harkness, James Alger, Stanton Dent, Geoffery Gardner, Lyndon Larson, Robert Nelson, Dow Corning Corporation

Technology of Group Assembly in Microelectronics based on Contact Units with Capillary Connecting Elements (Capillary Connection Technology™)
Alexander I. Taran, Andrew A. Belov, Microelectronics Assembly Innovations; Charles E. Bauer, TechLead Corporation

A Study of the Conduction Mechanisms of Screen-Printed Thick Films of MnZn Ferrite
Khalil Arshak, Karen Twomey, University of Limerick 

Flip Chip Technologies of Direct Bump-on-Copper /low-k
Jamin Ling, Tony Pan, Pete Elenius, KNS - Flip Chip Division

Biomedical Sensors: New Application Horizons? - A Review
Gabor Harsanyi, Budapest University of Technology and Economics



Friday, September 6, 2002

FA1
High Density Packaging
Chairs: R. Wayne Johnson, Auburn University; Scott Popelar, IC Interconnect
8 am - 11:25 am

Several innovations in high density packaging technologies including fine pitch packages and their assemblies, surface mount and flip-chip technologies will be presented.  

High Density Stacked Packaging Solution for SiP Applications
Vern Solberg, Tessera Technologies

Very-Very Thin Profile Small Outline Package for Memory Card
In-Ku Kang, Sang-Ho An, Jae-Min Kim, Se-Yong Oh, Samsung Electronics

Wirebondability of Electroless Ni/Au Plated Semiconductor Package Substrates
Jaydutt Joshi, Seth Greiner, Conexant Systems, Inc.

Design and Reliability Study of High-Density Memory Modules
Ilyas Mohammed, Young-Gon Kim, Tessera Technologies, Inc.

The Reliability of the 1st Level and the 2nd Level Joint on Flip Chip Package
Eun-Chul Ahn, Ju-Hyun Lyu, Young-Min Lee, Tae-Gyeong Chung, Se-Yong Oh, Samsung Electronics Co., Ltd.

Reliability Challenges of Flip Chip on Organic Substrate
Tae-je Cho, Eun-Chul Ahn, Jong-Bo Shim, Ho-Joong Moon, Se-Yong Oh, Samsung Electronics Co.


FA2
Thick Film II
Chair: Paul Galletta, Teledyne Electronic Technologies
8 am - 11 am

Thick film and thin technology are the base line building blocks for most of the microelectronic devices in existence today. This session will highlight the newer aspects of these technologies and how it can support your needs from D/C to light. These technologies have reinvented itself to support a whole new series of product lines that meet both the cost and performance needs of those products. Please join us in a lively session that will explore new approaches for this 25 plus years old technology.

Simulation, Characterization and Design of Embedded Resistors in LTCC for High Frequency Applications
Fred D. Barlow, Gangqiang Wang, Aicha Elshabini, University of Arkansas

Experiences in Obtaining Cross Belt Uniformity of ±1 °C in a 24-inch Wide Thick Film Conveyor Furnace
Fred C. Dimock, BTU International

Copper Electroplating for Thick-Film Power Applications: A Successful Laboratory Method for Prototyping
Khalil Arshak, David Egan, University of Limerick

Insertion Loss of A6 LTCC System up to 40 GHz
Liang Chai, Aziz Shaikh, Vern Stygar, Reinhard Kulke, Ferro Corporation

A Study of Microwave Behavior of a Thin-Print Gold Ink
David J. Nabatian, Chuck Rosenwald, KOARTAN Microelectronic Interconnect Materials


FA3
Thermal Mechanical and Electrical Modeling
Chair: Li Zhang, National Semiconductor Corp.
8 am - 11 am

Electrical and thermo-mechanical modeling has increasingly become an integral part of robust package design and cost reduction. This session covers papers on CFD simulation of electronic equipment with radiation and convection effects, thermo-mechanical modeling of RF power sensor systems, thermal compact models for IC packages, and electrical simulation for wideband applications, modeling of structures with embedded passives for RFIC applications, and 3D electromagnetic modeling of optoelectronic transceivers.

Linearised Superposition using CFD for Thermal and Power Characterization of Electronic Equipment with Significant Thermal Radiation and Natural Convection
Paul Gauché, Flomerics Inc.; Wen Wei, Intel Corp.

Thermo-Mechanical Simulation and Modeling of RF Power Sensor Microsystem
Jiri Jakovenko, M.Husak, T. Lalinsky, Czech Technical University in Prague

Modeling of Return Loss on Multilayer Package for Wideband Applications
Nansen Chen, Kevin Chiang, Y. P. Wang, SPIL

New Configurations for High Frequency Capacitors and Composite Structures for Embedded Passive and RFIC Applications
Kala Gururajan, Harish Peddibhotla, Raghu K. Settaluri, Oregon State University

3D Electromagnetic Simulation of Optoelectronic Transceiver Structures
John Schultz, Marek Turowski, Robert Trammel, Gordon Henson, 3M Company

The Extraction of a Two-Resistor/Two-Capacitor Model for Common IC Packages and their Implementation in CFD
Sarang Shidore, David Stiver, Flomerics Inc.

Rapid Analysis of Power/Ground Plane Decoupling using New Solution Methods
Richard T. Remski, Ansoft Corporation


FA4
Optoelectronics
Chairs: Phil Zulueta, JPL; Ephraim Suhir, Iolon, Inc.
8 am - 11 am

As the Photonics/Optoelectronics industry continues to experience growth fluctuations, the attempt to find reliable, low cost methods of assembling optoelectronics remains a primary focus among researchers, technologists and package-developers. This session in Photonics/Optoelectronics Packaging reflects this theme as it addresses work, ranging from novel adhesive and process technologies for fiber alignment and VCSEL assemblies to the development of new glasses for planar, optical waveguides.

Curing Low Yields and Reliability Issues in Photonics Assembly
Mike Martuscello, Lambda Technologies

An O/E Measurement Probe Based on an Optics-Extended MCM-D Motherboard Technology
Herbert DePauw, J. De Baets, J. Vanfleteren, A. Van Calster, Ghent University (ELIS-TFCG) / IMEC

Characterization of Adhesives for Low Temperature Microelectronics and Photonics Packaging
Curtis Taylor, Hameed Naseem, William Brown, University of Arkansas

Adhesive Assembly for Optoelectronic Transceivers
John Schultz, Ron Davis, Glen Connell, Gordon Henson, 3M Company

An Optimized System Solution for an Opto-electronic Transceiver Module
Abdolreza Langari, Hassan Hashemi, Mindspeed Technologies Inc.; Winfred Morris, Rockwell Scientific Company

Planar Optical Waveguides Fabricated by Ion-Exchange of Transition Metal Ions in Commercial and Special Optical Glasses
Jarmila Spirkova, P. Nebolova, P. Nekvindova, M. Mika, A. Mackova, G. Kuncova, A. Langrova, K. Mach, J. Schrofel, Institute of Chemical Technology


Special Session*
8 am - 10:35 am

FA5
National Science Foundation & Sidney J. Stein Educational Foundation
Chairs: Rao Tummala, Leyla Conrad, Georgia Institute of Technology

DC Resistivity Profile of Multilayer Dielectric Devices for Production Process Improvement
Aaron E. Hydrick, Alfred University

Surface Preparation of AlN Substrates for Metallization
Robert Campman, The New York State College of Ceramics at Alfred University

Fabrication of a Pressure Utilizing Low Temperature Co-fired Ceramics
Yasmin Morales, Boise State University

Finite Difference Time Domain Simulation of Multiport Networks using S-Parameter Macromodels for Packaging Applications
Chris Lasek, University of Colorado @ Boulder

Chip-Package Co-design of RF Microsystems
Leroy Griffith, Rochester Institute of Technology

Authors are NSF/SJS 2001-2002 Award Recipients
*Presentations will be 20 minutes each.

 

 

International Microelectronics And Packaging Society
611 2nd Street, N.E.
Washington, D.C.  20002
Phone: 202/548-4001; Fax: 202/548-6115

Questions Or Comments About Our Site?