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IMAPS Topical Workshop and Tabletop Exhibition on
Military, Aerospace, Space and Homeland Security:
Packaging Issues and Applications (MASH 2005)

download PDF

Sacramento Marriott
11211 Point East Drive
Rancho Cordova, CA 95742 USA
Exhibits
May 3 & 4, 2005
Exhibit Info | Reserve Booth
Conference & Events
May 3 - 5, 2005
Register | Hotel


Sponsored by
IMAPS - International Microelectronics And Packaging Society
Everything in electronics between the chip and the system!

and endorsed by
The Office of the Secretary of Defense



General Chair:
Greg Caswell, VirTex Assembly Services
Office: 512-835-6772
Cell: 512-680-6269
Email: gregc@virtexassembly.com
Technical Chair:
Carolynn Drudik, Defense Microelectronics Activity (DMEA)
Office: 916-231-1559
Email: drudik@dmea.osd.mil


Registration, Exhibits and Hotel Early Discount Cutoff - April 11, 2005

Message from the General Chair:

In our current environment, where the focus continues to be on military activities and homeland security, extensive work is being done to advance the state-of-the-art in high reliability electronics packaging. This year's technical program consists of over 20 presentations on the latest military, aerospace, space and homeland security electronic devices, systems, and applications, with particular emphasis on design, fabrication, assembly, testing, and materials selection. We are also having a special session on marketing this year which will focus on parts obsolescence issues and US-based resources. In addition to this powerful program, we have a leadoff Keynote Presentation from Mr. Ted Glum of the Office of the Secretary of Defense, Defense Microelectronics Activity. He will be discussing key DoD Microelectronics Technology Initiatives.

See you in Sacramento,
Greg Caswell


Tuesday, May 3

Registration: 7 am - 5 pm

Continental Breakfast: 7:30 am - 8:30 am

Exhibit Hours: 3 pm - 7 pm
Refreshment Breaks & Reception in the Exhibit Area

Opening Remarks: 8:50 am
General Chair - Greg Caswell, VirTex Assembly Services
Technical Chair - Carolynn Drudik, DMEA

Keynote Presentation: 9 am
Title: DoD Microelectronics Technology Initiatives
Speaker:
Mr. Ted Glum, Director
Defense Microelectronics Activity

Break: 10 am - 10:30 am

Session I: Military, Space, Spaceborne and Homeland Security Marketing Issues
Session Chair: Greg Caswell, VirTex Assembly Services

10:30 am - Noon

Obsolescence and Reliability Relationships
Walter J. Tomczykowski, ARINC

A University-Based Resource for Miniature Electronics
Karen White, North Dakota State University

Lunch: Noon - 1 pm

Session II: Solder and Lead Free Issues for Military and Spaceborne Electronics
Session Chair: Carolynn Drudik, DMEA

1:15 pm - 4:45 pm

Lead Free Solder for Low Cost, High Speed, High Bandwidth Packages for Military, Space and Homeland Security Applications
Rathindra Pal, Kingsley Berlin, Shapna Pal, Department of Defense

Electrochemical Corrosion Study of Pb-Free Solders
B.Y. Wu, Y. C. Chan, M. O. Alam, J. K.L. Lai, W. Jillek, City University of Hong Kong

Active Solder Materials: A Solution for Systems using High Performance Materials
Randall Redd, Ronald W. Smith, S-Bond Technologies LLC

Lead Free Impacts on DoD Microelectronics
Vance Anderson, DMEA

Break: 3:15 pm - 3:45 pm

High Reliability Lead Free Manufacturing from a Contract Manufacturer's Perspective
Greg Caswell, VirTex Assembly Services

Failure Mechanisms of Ball Grid Array (BGA) Solder Joints Under High Current Stress
Y. C. Chan, M. O. Alam, Boyi Wu, City University of Hong Kong

Reception/Dinner: 5 pm - 7 pm


Wednesday, May 4

Registration: 7 am - 5 pm

Continental Breakfast: 7 am - 8 am

Exhibit Hours: 10 am - 4 pm
Refreshment Breaks & Lunch will be held in the Exhibit Area

Session III: Packaging Issues and Applications for High Reliability Military and Spaceborne Systems
Chair: Phil Zulueta, Jet Propulsion Laboratory

8 am - Noon

Extending High Performance Chip Packaging Technology to Multi Chip Modules, System on a Chip and High Performance Multi-Layer Printed Circuit Boards
John R. Gardner, Steve Neu, 3M

Parallel Optical Transceivers for Aerospace Applications Using Flip Chip Bonding Technology
Charlie Kuznia, Chuck Tabbert, Dick Pommer, Joe Ahadian, Rich Hagan, Peregrine Semiconductor

Thin Film Technology on Diamond Substrate & Flip Chip: A Route for using Wide Band Gap Transistors in Space Applications
Claude Drevon, Alcatel Space; C. Schaffauser, O. Vendier,
D. Geoffroy, S. Delage, TRT; J. L. Roux, CNES

Laser Ultrasonic Inspection of Subsurface Defects in Flip Chips
Marvin B. Klein, Lasson Technologies, Inc.; T. L. Steen, T. W. Murray, Boston University

Break: 10 am - 10:30 am

Increasing Memory Density for High Performance Systems
Charles White, Philip Damberg, Tessera Inc.

The Development of Packaging for Narrow and Broad-Band Applications
Arne Knudsen, Jerry Aguirre, Mark Eblen, Paul Garland, Chris Gordon, Andrew Piloto, Heather Tallo, Joseph Tallo, Rei Yamada, Kyocera America, Inc.

High Density Packaging for Military and Aerospace Electronics using Fine Pitch BGA and Bare Die Stacking
Keith Sturken, Bill Davis, BAE Systems

Lunch: Noon - 1 pm

Session IV-A: Reliability Issues
Session Chair: Greg Caswell, VirTex Assembly Services
1:15 pm - 3:15 pm

Design Guidelines to Implementing Six Sigma Flip Chip Assembly Yields
Daniel Baldwin, Engent, Inc.; Chunho Kim, Intel Corp.

Reliability Construction Analysis
Gary Gaugler, Microtechnics, Inc.

Converting Ball Grid Array Components to Column Grid Array
Russell Winslow, Six Sigma

Reliability Assessment of COB Technology for Extreme Low Temperature Environment
Sharon Ling, Johns Hopkins University, APL

Break: 3:15 pm - 4 pm

Session IV-B: Emerging Technologies
Session Chair: Greg Caswell, VirTex Assembly Services

4 pm - 5:30 pm

ESD Protection of a RF Integrated Circuit by Embedding Protection in the IC Printed Circuit Board
Karen Shrier, Electronic Polymers

Generic, Direct-Chip-Attach MEMS and Sensor Packaging Design with High Density and Aspect Ratio through-Wafer Electrical Interconnect
Daniel Baldwin, Engent, Inc.; Seong Joon Ok, Georgia Institute of Technology

Multilithic Microsystem Flip Chip Solution for Defense Applications
Mark Faulkner, Ed Stoneham, Anthony Sweeney, Endwave Defense Systems


Thursday, May 5

Registration: 7:30 am - Noon

Continental Breakfast: 7:30 am - 8:30 am

Session V: System Level Packaging Issues
Session Chair: Jim Cook, Consultant

8:30 am - Noon

Tamper Resistant Packaging for Securing Secret Information
Richard Martin, W. L. Gore

Python Next Generation TeraFLOPS Computer Module
Harold L. Snyder, Physical Solutions

System-Level Integration and Miniaturization: The Next Step beyond High Density Packaging
Nicholas J. Colella, Jeffrey Demmin, Tessera Inc.

Break: 10 am - 10:30 am

High Temperature & High Power Intelligent Motor/Actuator Controller for Military and Commercial Avionics Systems
Harold L. Snyder, Physical Solutions

Epsilon Low-Cost Compact Microwave and Millimeter-Wave Subsystem Packaging for Defense Applications
Mark Faulkner, Ed Stoneham, Anthony Sweeney, Endwave Defense Systems

Wrap up: General Chair


Tour of the Defense Microelectronics Activity

May 5, 2005
4234 54th Street (Bldg. 620), McClellan, CA 95652

3 Tours (Limited to 20 attendees each)
Tour Start Times:
13:00, 14:00, 15:00 (1 pm, 2 pm, 3 pm)
First come - first served basis.
Register Early!

The Defense Microelectronics Activity (DMEA) was founded because technological superiority is the essential underpinning of US military strategy. In recognition of the critical importance of technology, the Department of Defense (DoD) took the extraordinary step of creating an organization whose sole mission is to provide leadership and guidance in microelectronics to the warfighter. DMEA has one-of-a-kind technological capability and highly specialized engineering expertise to design, prototype and fabricate new microelectronic components and systems. The tour will encompass DMEA's microelectronics engineering, design, prototyping, testing, processing and foundry capabilities.

The foundry at DMEA is a true flexible foundry capable of producing any quantity, small or large, of microelectronic devices in a variety of semiconductor processes. Foundry process runs are a result of intellectual property licensing agreements with industry to transfer commercial technology to the DoD (DMEA) with multiple semiconductor manufacturers like IMP, Raytheon, Peregrine, and Intersil.

DMEA currently supports the Army, Navy, Air Force, Marines, Department of Homeland Security, Department of Energy, Department of Transportation, Department of Justice, as well as many defense contractors and international programs from the United Kingdom and other allies. The Secretary of Defense declared the highly specialized group of engineers and facilities at DMEA to be a unique national resource.

To sign up, please e-mail Ms. Carolynn Drudik at DMEA, drudik@dmea.osd.mil For Nationals: Please include your name and company. For Foreign Nationals: Please include your name, company, birth date, city, and country information. Also, please bring your passport for identification.


Hotel Information (Hotel Cut-off April 11, 2005)

Reservation must be made directly with the:

Sacramento Marriott Rancho Cordova
11211 Point East Drive
Rancho Cordova, CA 95742
P: 916-638-1100; F: 916-638-5803

On-line: www.marriott.com/sacmc
Promotional codes: 1 King Bed - micmica; 2 Queen Beds - micmicb

Single/Double: $139

Please reference IMAPS when making reservations over the phone/fax. Reference promotional codes when making reservations over the website.

Sacramento Marriott Rancho Cordova requires a deposit for the first night's room and tax to hold your room. Deposit refunded if reservation is cancelled fourteen (14) days prior to arrival.


Register On-line | Hotel Info
Tabletop Exhibit Info | Reserve Booth On-line

 


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IMAPS-International Microelectronics And Packaging Society and The Microelectronics Foundation
611 2nd Street, N.E., Washington, D.C. 20002
Phone: 202-548-4001

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