Micross


IMAPS PDC Webinar Series on
Best of "2013 Packaging Advances, Updates & Trends"
Featuring 4 separate webinars on: 3D, Flip Chip, MEMS, & Embedded Chips

Webinar 1 - 3D: January 7 & 9, 2014 at 12:00 NOON EASTERN
Webinar 2 - Flip Chip: January 14 & 16, 2014 at 12:00 NOON EASTERN
Webinar 3 - MEMS: January 21 & 23, 2014 at 12:00 NOON EASTERN
Webinar 4 - Embedded Chips: January 28 & 30, 2014 at 12:00 NOON EASTERN

Each webinar consists of two sessions/days.
Take each series separately or register for all 4 webinars at a discounted rate!

1 Webinar: $200 (Member); $300 (Non-Member)
4 Webinar Bundle: $600 (Member); $900 (Non-Member)

INTERESTED IN DOWNLOAD/REPLAY? Contact bschieman@imaps.org


Webinar Description

A NEW series of 4 stand-alone webinars (3D, Flip Chip, MEMS and Embedded Chips) has evolved from one of the best attended Professional Development Courses, "2013 Packaging Advances, Updates and Trends" presented at the IMAPS2013 Symposium in Orlando, and the overwhelming response by engineers who took this course. The engineers reviewed 66 white paper topics and selected 48 topics as the most relevant. These topics form the basis of Best of 2013 Packaging Advances, Updates & Trends, a webinar series which has been divided into 4 main technical areas (3D, Flip Chip, MEMS and Embedded Chips), each with 2 sessions. Each 2-day webinar stands alone. This new series of webinars provide a unique engineer-rated update in technology trends based on selected highlights of papers presented at 2013 conferences and symposia along with excerpts from trade press and publicity releases.

Specific input for this series was chosen from the following organizations: CEA-LETI, STMicroelectronics, Disco, Shinko Electric Industries Co., Taiwan Semiconductor Manufacturing Company (TSMC), Tohoku University, Amkor Technology Inc., Dow Electronic Materials, Fraunhofer IZM, IBM Corporation, Sumitomo 3M, Qualcomm, Institute of Microelectronics, Namics Corporation, Yole Développement, Texas Instruments Inc., Vitesse Semiconductor Corp., Hanyang University, Siliconware Precision Industries Co., Ltd, Georgia Institute of Technology, HKUST, Huazhong University of Science & Technology, Nordson ASYMTEK, National Institute of AIST, University of Freiburg & IMTEK, Industrial Technology Research Institute (ITRI), Advanced Semiconductor Engineering, Inc., Mitsubishi Materials Corporation, KAIST, Toray Industries Inc., STATS ChipPAC Ltd., Intel Corporation, Fraunhofer Institute for Reliability and Microintegration, Unimicron Technology Corp, FlipChip International.

Attendees will have access to their webinar's slides and technical references. Email requests from attendees will be honored for additional specific complete references used in their webinar.

Who Should Attend?

This webinar's target is the time-constrained participant with little to no extra time to constantly review daily news releases and/or attend major symposia/workshops to stay current with the latest technological developments in new advanced packaging technology. Also relevant for entry-level technicians and engineers and people in quality assurance, sales, marketing, purchasing, safety, administration and program management. The course uses simple terms, defines the many acronyms for ease of understanding, and avoids complex concepts and equations. However, these advanced details are also provided upon request.

Below is a course outline for each webinar course and the specific sessions. Each session is scheduled for 50 minutes of lecture followed by 10 minutes of Q&A.

Webinar #1:
Course Title: 3D - Best of "2013 Packaging Advances, Updates & Trends"

This two-session on-line Professional Development Course (PDC) webinar will be held:
Tuesday, January 7, 2014 and Thursday, January 9, 2014, 12 noon - 1 p.m. EASTERN

3D Session 1 of 2: Tuesday, January 7 -- 12:00-1:00 PM EASTERN

  • Overview
  • Summary of 3D polymeric materials
  • Chip on Wafer on Substrate (CoWoS) design integration
  • Ultra thin die stacking
  • Interposer warpage control
  • PoP warpage control

3D Session 2 of 2: Thursday, January 9 -- 12:00-1:00 PM EASTERN

  • 3D Integration using self-assembly
  • Low cost chip on chip
  • Temporary & permanent wafer bonding
  • Thermally enhanced underfill
  • Chip Package Interactions (CPI) at 22nm
  • 3D microbump electromigration study)

Webinar #2:
Course Title: Flip Chip - Best of "2013 Packaging Advances, Updates & Trends"

This two-session on-line Professional Development Course (PDC) webinar will be held:
Tuesday, January 14, 2014 and Thursday, January 16, 2014, 12 noon - 1 p.m. EASTERN

Flip Chip Session 1 of 2: Tuesday, January 14 -- 12:00-1:00 PM EASTERN

  • Overview
  • Differential heating/cooling bonding
  • No clean flux for large FC bonding
  • Thermal compression/non-conductive paste for fine pitch FC
  • Improved prediction of FC electromigration
  • 20 um pitch bonding

Flip Chip Session 2 of 2: Thursday, January 16 -- 12:00-1:00 PM EASTERN

  • Electro vs. electroless microbump plating
  • Microbump bondability guidelines
  • Microbump plating
  • Nanofiber Sn58Bi solder anisotropic conductive films (ACF)
  • Coreless substrates

Webinar #3:
Course Title: MEMS - Best of "2013 Packaging Advances, Updates & Trends"

This two-session on-line Professional Development Course (PDC) webinar will be held:
Tuesday, January 21, 2014 and Thursday, January 23, 2014, 12 noon - 1 p.m. EASTERN

MEMS Session 1 of 2: Tuesday, January 21 -- 12:00-1:00 PM EASTERN

  • Overview
  • Sealing dispensing for MEMS
  • Chip on chip or face to face Possum™ MEMS
  • Hermetic wafer level packaging of MEMS

MEMS Session 2 of 2: Thursday, January 23 -- 12:00-1:00 PM EASTERN

  • High efficiency carrier wafer self-assembly
  • Outgassing characteristics of thin film materials
  • SiC-MEMS operating at 500°C
  • MEMS-based combo sensors utilizing wafer level packaging (WLP)

Webinar #4:
Course Title: Embedded Chips - Best of "2013 Packaging Advances, Updates & Trends"

This two-session on-line Professional Development Course (PDC) webinar will be held:
Tuesday, January 28, 2014 and Thursday, January 30, 2014, 12 noon - 1 p.m. EASTERN

Embedded Chips Session 1 of 2: Tuesday, January 28 -- 12:00-1:00 PM EASTERN

  • Overview
  • Innovative fan-out (FO)
  • Embedded wafer level ball grid array (eWLB) solutions
  • Embedded capacitors in microprocessors
  • Wafer level to panel level mold embedding

Embedded Chips Session 2 of 2: Thursday, January 30 -- 12:00-1:00 PM EASTERN

  • Embedded high power electronics modules using sintered silver chip attach
  • Innovative embedded interposer carrier
  • Wafer level packaging for embedding ultrathin (6 µm) chips
  • ChipsetT™ embedded die substrate applications

 

Phil Creter

Presenter

Phillip Creter has over 30 years of microelectronics packaging experience. He is currently a consultant (Creter & Associates) gaining his microelectronics packaging experience at Polymer Flip Chip Corporation, Mini-Systems, GTE and Itek Corporation. His past positions include GTE Microelectronics Center Manager (received GTE Corporate Lesley Warner Technical Achievement Award), Process Engineering Manager, Process Development Manager, Materials Engineering Manager, and Manufacturing Engineer, receiving many awards of distinction. He is a well-known presenter who has published technical papers in IEEE Transactions, Solid State Technology, High Density Interconnect, Circuits Manufacturing, Insulation Circuits, and others. He has chaired many technical sessions for symposia, has given hundreds of technical presentations, and is a U.S. patent holder. He has been developing and teaching college-level microelectronics courses since 1997 and has continuously taught professional development courses for online webinars and at various national microelectronics symposia and workshops. He is an active certified instructor for the Department of Homeland Security, currently teaching courses locally. He is a Life member of the International Microelectronics Assembly and Packaging Society (IMAPS). He was elected Fellow of the Society, National Treasurer and President of the New England Chapter.

 

 

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