Device Packaging Technical Speakers


TECHNICAL PRESENTATIONS

 

Over 65 technical presentations across 3 tracks and 16 session categories will be available for on-demand viewing beginning on April 12-15th. Posters will also be available for on-demand viewing, complemented by a live Q&A sessionApril 15th. View the technical speakers and titles below!

3D Integration Track


Track Chairs:

Lars Boettcher, Fraunhofer IZM; Mike Kelly, Amkor Technology; Marco Delsarto, STMicroelectronics

Technical Committee:

Rahul Agarwal, AMD; Dongshun Bai, Brewer Science; Severine Cheramy, CEA Leti; 

Rafiqul Islam, Cactus Materials; Suresh Jayaraman, Amkor Technology; Bora Baloglu, Amkor Technology

3D TECHNOLOGY - 1

3D Packaging from Edge to the Datacenter:  An Imperative for the Next Decade
Vaibhav Trivedi, Yole Development


TSV and Hybrid Bonding Solutions for 3D Heterogeneous Integration Packaging Applying in next AI / HPC Era
Albert Lan, Applied Materials


Custom CTE Glass Carrier for Wafer Thinning
Indrajit Dutta, Corning Incorporated


3D TECHNOLOGY - 2

Magnetic Core Inductor Embedded in Laminates for 3D Integration
Yanze Wu, Arizona State University


A Low Tg Bonding Material for use with Wafer-Level System-in-Package (WLSiP) and Fan-Out Wafer-Level Packaging (FOWLP)
Arthur Southard, Brewer Science, Inc. (Rachel Cartaya)


High Speed Transmission Characteristics on Glass Interposer for High Performance Computing
Satoru Kuramochi, Dai Nippon Printing


3D TECHNOLOGY- 3

Printed 3D Interconnects Enable mmWave Interconnects Over 100Ghz
Bryan Germann, Optomec


Laser Assisted Deposition for Advanced Packaging
Michael Zenou, IO Tech


METROLOGY AND VALIDATION METHODS

Hybrid Metrology Solutions for Monitoring Microbump Process 20micron Pitch and Less for 2.5D and 3D Integration
Priya Mukundhan, Onto Innovation (Manjusha Mehendale, Johnny Dai, Robin Mair, Jay Chen, Andy Antonelli)


Evaluation of Material and Geometric Design Variation on Failure within Device Embedded Substrates
Daniel Flintoft, National Physical Laboratory


Design and Simulation of 3D TSV Inductor for IoT Applications
Bruce Kim, City University of New York


3D APPLICATION & DESIGN

Heterogeneous IC Packaging,  Options for Optimizing Performance and Cost
Michael Kelly, Amkor Technology (Dave Hiner, George Scott) 


Innovative Stackable Package-on-Package (mPoP) for the Heterogeneous Integrated Product Design Using Fan-Out M-Series
Byung Cheol Kim, Nepes Corporation (Jay Kim, Yoon Mook Park, Tae Yong Kwon, Hyung Jin Shin, Nepes Corporation; Mary Maye Melgo, Nepes Hayyim Inc.)


Package Assembly Design Kits. What are They and How Can They Benefit the Packaging Community
John Park, Cadence Design Systems


Flexibility of System Technology Co-Optimization (STCO) Demands a Shift-Left Process and Methodology
Keith Felton, Mentor Graphics Corporation (Per Viklund, Siemens DISW)


System Level Design Assembly and Management for 3D-IC Architectures
Brian Jackson, Cadence Design Systems, Inc.



Fan-Out, Wafer Level Packaging & Flip Chip


Track Chairs:

Curtis Zwenger, Amkor Technology; Nokibul Islam, JCET Group; Amy Lujan, SavanSys

Technical Committee:

Linda Bal, TechSearch International; Beth Keser, Intel; Scott Hayes, NXP; Anup Pancholi, Intel; Chris Scanlan



FO-WLP: TECHNOLOGY & RELIABILITY

Cost Analysis of Lithography Options for Panel-Level Fan-out Packaging
Amy Lujan, SavanSys Solutions LLC


Chip Package Bumping on Wafer-level for RDL First Fan-out Wafer

Anshuma Pathak, Pac Tech Packaging Technologies GmbH


Setting the 600mm Large Panel Fan-Out Standard with M-Series TM

Clifford Sandstrom, Deca Technologies (Timothy Olson)


New Adaptive Patterning Techniques for the Chiplet Era

Craig Bishop, Deca Technologies (Chris Negrich, Jiyang Zhou, Ryan Bartling)


Electromigration Study of a Novel Cu Stack-via Interconnect for Advanced High-density Fan-out Packaging

Kuan-Ju Shao, National Cheng Kung University (Min-Yan Tsai, Chin-Li Kao, ASE Group; Chien-Lung Liang, Kwang-Lung Lin, National Cheng Kung University; Gao-Tian Lin, VIACPU Technologies)


Effect of Silicon BEOL Presence on Solder Fatigue Life During Board-Level Thermal Cycling of WLCSP

Rameen Hadizadeh, Cirrus Logic (Yaoyu Pang, Anuj Patel)


FO-WLP: DESIGN & APPLICATION

2-High Stacked Heterogeneous System-in-Package (HSIP) Modules Using Solder Assembly
Charles Woychik, i3 Microsystems, Inc.


Using Deca's Adaptive PatterningTM to Win the Chiplet Integration Race with Siemens EDA and ASE

Robin Gabriel, Deca Technologies (Jan Kellar, Deca Technologies; Keith Felton, Ian Gabbitas, Mentor a Siemens Business; John Hunt, Lihong Cao, ASE US)


Universal IoT Sensor Platform based on a FOWLP RDLfirst Approach

Tanja Braun, Fraunhofer IZM (Mathias Böttcher, Michael Schiffer, Harald Pötter, Carsten Brockmann, Karl-Friedrich Becker)


Die-first and RDL-first FOWLP Processing for Flexible Hybrid Electronics

Takafumi Fukushima, Tohoku University


FO-WLP: EQUIPMENT AND MATERIALS

Chemistry, Tool and Process Considerations for the Removal of Residual Bonding Residues and Protective Dicing Coatings
Phillip Tyler, Veeco Process Equipment


A Novel Photosensitive Permanent Bonding Material for Polymer/Metal Hybrid Bonding

Baron Huang, Brewer Science, Inc. (Duo Tsai, Xiao Liu, Rama Puligadda)


Latest Technologies of
Epoxy Molding Compound (EMC) for FO-WLP
Masahiro Iwai, Sumitomo Bakelite, Ltd.


Advancements of Temporary Bond and Debond: Creating Photonic Debond Methods and Materials for Wafer-Level Packaging

Luke Prenger, Brewer Science, Inc. (Xiao Liu, Xavier Martinez, Brewer Science, Inc.; Vikram Turkani, Vahid Akhavan, Kurt Schroder, NovaCentrix, Inc.)


Improving Seed Layer Adhesion and Reliability Through RIE Pretreatment

Mohamed Elghazzali, Evatec AG (Roland Rettenmeier)


Active Mold Packaging for No
vel RDL Formation in a Fan-In Ball Grid Array for Power Applications
David Lee, Azimuth Industrial Company Inc. (Florian Roick, LPKF Laser & Electronics AG; Richard Retallick, MacDermid Alpha Electronics Solutions; Masaru Endo, Sumitomo Bakelite Co., Ltd.)


FLIP CHIP PROCESSES AND MATERIALS

High Thermal Performance TIM (Thermal Interface Material) for Lidded FCBGA Products
YoungDo Kweon, Amkor Technology Inc.


Individual Die or Wafer ENEPIG Plating for Conventional Wire Bonding or Flip-Chip Solderability without RDL

Erick Spory, GCI Global


Process Control Methods and Applications of In-line Automatic X-ray Inspection in High-volume Manufacturing

Brennan Peterson, SVXR Inc.


FLIP CHIP DESIGN, SIMULATION & PERFORMANCE

Challenges for Achieving Automotive Grade 1/0 Reliability in FCBGA and fcCSP Packages
Knowlton Olmstead, Amkor Technology, Inc.


Die-to-Die Interconnect Design and Simulation for 2.3D Organic Interposer Package

Cindy Muir, Intel Corp. (Bernd Waidhas, Abdallah Bacha, Carlton Hanna, Beth Keser)



Advanced Packaging & Emerging Materials for Automotive, 5G & Next Gen Applications

Track Chairs:

Tu-Anh Tran, NXP; Jason H. Rouse; Vik Chaudhry, Amkor Technology

Technical Committee:

Urmi Ray, Consultant

AUTOMOTIVE APPLICATIONS - ADVANCE PACKAGING AND TEST - SESSION 1

Galvanically Isolated Communication Linkage Package for Automotive High-Voltage IGBT/SiC Gate Driver
Burton Carpenter, NXP Semiconductors


Chip Scale Power Tra
nsistor Packaging
Shaun Bowers, Amkor Technology, Inc.


Power Packaging Trends in Emerging 48V Ecosystem

Ajay Kumar Sattu, Amkor Technology, Inc.


MAXQFP: NXP New Package Platform for Automotive Application
Chu-Chung Stephen Lee, NXP Semiconductors    (Tu-Anh Tran, Andrew Mawer, XS Pang, JZ Yao)


AUTOMOTIVE APPLICATIONS - ADVANCE PACKAGING AND TEST - SESSION 2

Process Improvements for First Pass Yield Gains during Tri-Temperature Automotive Package Test
Jerry Broz, International Test Solutions (Bret Humphrey)


Eliminate Costly Component Out Of Pocket Defect Condition During Semiconductor IC Transport/Handling

Richard Rochford, BAE Systems (Craig Blanchette, Bae Systems; Darby Davis, Gel-Pak)


High Performance Computing SiP for Advanced Automotive
Nokibul Islam, JCET


Design of Subsystem Module Package for Power Distribution Network
HoJeong Lim, Amkor Technology, Inc. (Ruben Fuentes)


AUTOMOTIVE APPLICATIONS - ADVANCE PACKAGING AND TEST - SESSION 3

Known Reliability with Improved Efficiency - the Next Generation Ni/Pd/Au Finish
Britta Schafsteller, Atotech Deutschland GmbH


Investigation of Carbon Fiber TIM Gap Pad for Enabling Next Generation Automotive High-Power Systems

Jerry Wu, Dexerials America Corp.


Advanced Materials for Automotive SiP Applications

Ken Araujo, NAMICS Corporation


Electromagnetic Interference (EMI) Shielding Technologies for Semiconductor Packages

Michael Liu, JCET Group Co., Ltd.


AUTOMOTIVE APPLICATIONS - ADVANCE PACKAGING AND TEST - SESSION 4

Pressure-Less Silver Sintering Paste for Die Attach on Bare Copper Surface Using Conventional Reflow Oven under Nitrogen
Sihai Chen, Indium Corporation (Andrew Yoder, Joshua Owens, Ning-Cheng Lee)


A Viable Copper Based Alternative to Palladium Activation Systems for Electroless Copper Processing

Roger Massey, Atotech Group (Laurence Gregoriades, Stefan Kempa, Andreas Kirbs, Josef Gaida, Julia Lehmann)


Solderless Anisotropic Conductive Film For Compact Package Designs, High-Frequency Signal Integrity, Robust Connections

Jerry Wu, Dexerials America Corp.


Analysis and Management of the Effects of Fluorinated Gases during Plasma Dicing

Richard Barnett, SPTS Technologies Ltd. (David Parker, STMicroelectronics)


Evolution and Applications of Fine-feature Solder Paste Printing for Heterogeneous Integration Assembly

Evan Griffith, Indium Corporation (Sze Pei Lim)


5G APPLICATIONS - ADVANCED PACKAGES, PROCESSES AND MATERIALS

A New Low-loss Photo Patternable Packaging Dielectric Material with the Option for Room Temperature Curing

Pawel Miskiewicz, Merck KGaA 


Emerging Process and Assembly Challenges in Electronics Manufacturing

Glenn Farris, Universal Instruments


Thermal Performance Enhancement of Dual Side Molding SiP Module for 5G Application

Hung-Hsien Huang, ASE Group (Wei-Hong Lai, Ian Hu, JimDL Chen, David Tarng, CP Hung)


VIAFFIRM™ Thin Glass Handling Technology

Aric Shorey, Mosaic Microsystems (Shelby Nelson, David Levy, Paul Ballentine)


Thermal Interface Materials in the HPC Era

Andy Mackie, Indium Corporation


NEXT GEN APPLICATION SOLUTIONS

New Composites Material of Silver and Diamond for High-performance Device

Hideaki Morigami, A.L.M.T.Corp.


The Intersection of Performance, Reliability and Low Cost Assembly in Thermal Interface Solution Selection

Craig Green, Carbice Corporation


Innovative PVD Technology Solutions for Advanced Substrate, Backside Metal and EMI Shielding

Jeff Turner, Applied Materials   


TLPS Pastes for Anywhere Embedded Passive Components in Substrates and PCBs
Catherine Shearer, EMD Performance Materials


Liquid Metal Embedded Elastomers (LMEEs) as an Emerging Material Architecture for TIMs in Semiconductor Packaging

Navid Kazem, Arieca Inc.




Poster Session

Investigation of Low Temperature Bonding Process based on Cu/Ni/In Solid Liquid Interdiffusion
Adil Shehzad, Fraunhofer IZM (ASSID) (luliana Panchenko, Juergen Wolf, Steffen Bickel, Wolfram Steller, Fraunhofer IZM (ASSID); Benedikt Wolfram, Semsysco GmbH)


Reliability Evaluation of a Low Loss Photodielectric

Katie Han, Kayaku Advanced Materials                                                                                                                                          


A New Dual-Band Resonator in Measuring Dielectric Constant at 5G Frequency Band and Yagi Antenna Implemented

Chia-Chu Lai, Siliconware Precision Industries Co.,Ltd. (Chuan Lin Ho, Teny Shih, Yu-Po Wang)


Modernization of Metrology for Metallization Solutions with ICP

Paul Okagbare, ECI Technology (Michael MacEwan, Eugene Shalyt)


Analysis of Advanced Polymer Semiconductor Packaging Materials by Atomic Scale Simulation

Andrea Browning, Schrodinger, Inc. (Simon Elliott, H. Shaun Kwak, Mathew Halls)


Stress Reduced Embedded Die Substrate Structure Fabricated for Heterogeneous Integration Using Selective Laser Ablation

Masamitsu Matsuura, Kyushu University (Tanemasa Asano, Haruichi Kanaya)